Hello,
On Thu, 12 Nov 2020, Stefan Kanthak wrote:
> Does GCC generate (unoptimised) code there, similar to the following i386
> assembly, using 4 loads, 4 shifts, 2 ands plus 3 ors?
Try for yourself. '-m32 -O2 -march=i386' is your friend.
Ciao,
Michael.
Spoiler: it's generating:
mov
libgcc2.c defines __bswapsi2() as follows:
typedef int SItype __attribute__ ((mode (SI)));
SItype
__bswapsi2 (SItype u)
{
return u) & 0xff00) >> 24)
| (((u) & 0x00ff) >> 8)
| (((u) & 0xff00) << 8)
| (((u) & 0x00ff) << 24));
}
JFTR: if (u & 0x80) == 0x80, (u & 0xf
