My hardware directly supports instructions of the form
subreg:SI(reg:VEC v1,3) = SI:a1
That is, a particular field of a vector register can be used as the
target of a move from a general register. Reginfo refuses to recognize
that any registers can satisfy this subreg expression and theref
For certain instructions, I am trying to do my own register assignments
before IRA runs. I call df_analyze to find all register references and
after my manipulations I call df_scan_blocks to reparse the insns.
A typical replacement that I want to handle is a register reference of
the form
