Retargetting alpha to mtalpha

Hi, I made an extension of the alpha backend. To make it cleaner I have created another backend directory (in gcc/config/mtalpha). I updated the configure scripts and binutils accordingly (with the new path, name "mtalpha", features of my extension). The problem is when I generate the compil

variable table in backend

Hi, Is there a structure/array/macro to access all the variables (something like a variable table) in the back-end after the instantiation of the virtual registers (vregs pass from function.c) ? Some info about variable + its virtual register and so on. Thanks, Thomas

Re: extra instructions lost from -O0 to -O1

s Ian Lance Taylor wrote: "Thomas A.M. Bernard" <[EMAIL PROTECTED]> writes: Ian Lance Taylor wrote: "Thomas A.M. Bernard" <[EMAIL PROTECTED]> writes: I guess I am missing something here. I've tried the following as Paolo suggeste

Re: extra instructions lost from -O0 to -O1

Ian Lance Taylor wrote: "Thomas A.M. Bernard" <[EMAIL PROTECTED]> writes: I guess I am missing something here. I've tried the following as Paolo suggested, (define_insn "setallocate" [(unspec_volatile:DI [(match_op

Re: extra instructions lost from -O0 to -O1

t\t#TCB_INSTRUCTIONS" [(set_attr "type" "multi")]) When flag -O0 is on, everything's fine. But when flag -O1 is engaged, the instruction is still omitted. Something missing ? Thomas Paolo Bonzini wrote: Thomas A.M. Bernard wrote: I have tri

Re: extra instructions lost from -O0 to -O1

ine_insn "setallocate" [(setallocate (unspec_volatile:DI [ (match_operand:DI 0 "general_operand" "r")] UNSPEC_ALLOCATE) )] "" "allocate %0\t\t#TCB_INSTRUCTIONS" [(set_attr "type" "m

extra instructions lost from -O0 to -O1

Hi, I inserted some extra instructions in the Alpha back-end (MD files). They are properly emitted when the flag -O0 is enabled. Since they have no side effects and no dependencies on other instructions, they are omitted when flag -O1 is engaged. Is there a way (I mean attribute/constraint in

virtual registers in ASM

Hi, Is there a way to order the compiler to output only virtual registers within the assembly code ? (pointers to GCC code sections in back-end or in MD files are welcome) Hence the result assembly code would not have a conventional register allocation. It would be using an unlimited number o

Access the BIND_EXPR of a function

Hi, When I encounter a FUNCTION_DECL, I want to access the node BIND_EXPR where I can find the artificial declarations of the current functions that the compiler adds. Following what the documentation says, I use the macro DECL_SAVED_TREE which should point to the node BIND_EXPR (used as follows,

Access the BIND_EXPR of a function

Hi, When I encounter a FUNCTION_DECL, I want to access the node BIND_EXPR where I can find the artificial declarations of the current functions that the compiler adds. Following what the documentation says, I use the macro DECL_SAVED_TREE which should point to the node BIND_EXPR (used as follows,

Re: GIMPLE nodes to ASM by using builtins

feature which is handle as an assembly instruction in my target architecture. One gimple node or field maps directly into an assembly instruction. T. Ian Lance Taylor wrote: "Thomas A.M. Bernard" <[EMAIL PROTECTED]> writes: What would be the difference by using an ASM ? The

GIMPLE nodes to ASM by using builtins

Hello I generate a GIMPLE form extended with new nodes coming from language extensions. I would like to generate assembly code directly from those nodes. I was thinking of using the GCC builtins system. But I cannot find the entry point (hook and file) within the files to do so. (GCC 4.1 vers

Re: AST-tree in GCC

Perhaps you could also try -fdump-tree-gimple or -fdump-tree-gimple-raw In both cases you dump out the GIMPLE form, AST based. Best, T. > Hi I want to extract the complete AST-tree from GCC (using 4.1.2). > I´ve tried to use -fdump-translation-unit but it seems like its dosent > include inform