Pip Cet writes:
> On Tue, Aug 18, 2020 at 6:52 AM Senthil Kumar Selvaraj
> wrote:
>> > recognize such insns, but as it stands that define_insn would
>> > recognize the incorrect insn:
>> >
>> > [(set (reg:QI 0) (const_int 0))
>> > (clobber (scratch:CC))]
>>
>> get_cc_reg_clobber_rtx also looks
Hans-Peter Nilsson writes:
> On Wed, 19 Aug 2020, Senthil Kumar Selvaraj wrote:
>>
>> Hans-Peter Nilsson writes:
>>
>> > On Fri, 14 Aug 2020, Senthil Kumar Selvaraj via Gcc wrote:
>> >> As you can deduce from the (set_attr "cc" ..), only
Hans-Peter Nilsson writes:
> On Fri, 14 Aug 2020, Senthil Kumar Selvaraj via Gcc wrote:
>> As you can deduce from the (set_attr "cc" ..), only constraint
>> alternatives 0,2,3 and 6 clobber CC - others leave it unchanged.
>
> Yes, I recognize that.
>
>>
Pip Cet writes:
> On Mon, Aug 17, 2020 at 7:31 AM Senthil Kumar Selvaraj
> wrote:
>> > (define_split
>> > [(parallel [(set (match_operand:ALL1 0 "nonimmediate_operand")
>> > (match_operand:ALL1 1 "nox_general_operand"))
>> > (clobber (reg:CC REG_CC))])]
>> > "reload_c
Pip Cet writes:
> On Sun, Aug 16, 2020 at 12:50 AM Segher Boessenkool
> wrote:
>> On Sat, Aug 15, 2020 at 10:18:27AM +, Pip Cet wrote:
>> > > > What I'm currently doing is this:
>> > > >
>> > > > (define_split
>> > > > [(set (match_operand 0 "nonimmediate_operand")
>> > > > (match_ope
Hi,
I'm working on porting AVR to MODE_CC, and there are quite a few
patterns that clobber the condition code reg only for certain
constraint alternatives. For e.g.,
(define_insn "mov_insn"
[(set (match_operand:ALL1 0 "nonimmediate_operand" "=r,d,Qm ,r
,q,r,*r")
(match_
