Re: Help needed with maintainer-mode

On 05/03/2024 14:26, Richard Earnshaw (lists) wrote: > On 04/03/2024 20:04, Jonathan Wakely wrote: >> On Mon, 4 Mar 2024 at 19:27, Vladimir Mezentsev >> wrote: >>> >>> >>> >>> On 3/4/24 09:38, Richard Earnshaw (lists) wrote: Tools like git (and svn before it) don't try to maintain time-sta

Re: Help needed with maintainer-mode

On 04/03/2024 15:36, Richard Earnshaw (lists) wrote: > On 04/03/2024 14:46, Christophe Lyon via Gcc wrote: >> On Mon, 4 Mar 2024 at 12:25, Jonathan Wakely wrote: >>> >>> On Mon, 4 Mar 2024 at 10:44, Christophe Lyon via Gcc >>> wrote: Hi! On Mon, 4 Mar 2024 at 10:36, Thomas

Re: Discussion about arm/aarch64 testcase failures seen with patch for PR111673

On 28/11/2023 12:52, Surya Kumari Jangala wrote: Hi Richard, Thanks a lot for your response! Another failure reported by the Linaro CI is as follows : (Note: I am planning to send a separate mail for each failure, as this will make the discussion easy to track) FAIL: gcc.target/aarch64/sve/a

Re: Discussion about arm testcase failures seen with patch for PR111673

On 24/11/2023 08:09, Surya Kumari Jangala via Gcc wrote: Hi Richard, Ping. Please let me know if the test failure that I mentioned in the mail below can be handled by changing the expected generated code. I am not conversant with arm, and hence would appreciate your help. Regards, Surya On

Re: gcc 13.2 is missing warnings?

On 19/10/2023 12:39, Eric Sokolowsky via Gcc wrote: I am using gcc 13.2 on Fedora 38. Consider the following program. #include int main(int argc, char **argv) { printf("Enter a number: "); int num = 0; scanf("%d", &num); switch (num) { case 1: int a =

Re: GNU Tools Cauldron 2023

It is now just under 2 months until the GNU Tools Cauldron. Registration is still open, but we would really appreciate it if you could register as soon as possible so that we have a clear idea of the numbers. Richard. On 05/06/2023 14:59, Richard Earnshaw wrote: We are pleased to invite you

GNU Tools Cauldron 2023

We are pleased to invite you all to the next GNU Tools Cauldron, taking place in Cambridge, UK, on September 22-24, 2023. As for the previous instances, we have setup a wiki page for details: https://gcc.gnu.org/wiki/cauldron2023 Like last year, we are having to charge for attendance. W

Re: Forward GCC '-v' command-line option to binutils assembler, linker (was: [PING] nvptx: forward '-v' command-line option to assembler, linker)

On 22/09/2022 12:32, Nick Clifton via Gcc wrote: Hi Thomas, +/* Linker supports '-v' option.  */ +#define LINK_SPEC "%{v}" ..., Tom rightfully asked: [...] I wonder, normally we don't pass -v to ld, and need -Wl,-v for that. So, on my quest for making things uniform/simple, I now wond

Re: Wanted: original ConceptGCC downloads / branch, concepts-lite branch

On 17/08/2022 12:42, Aaron Gray via Gcc wrote: Hi, I am looking for the original ConceptGCC source code, the https://www.generic-programming.org/software/ConceptGCC/download.html has all broken links and the SVN is gone. Is this available on GCC git or SVN ? Also I am wondering if the origi

Re: Setting up editors for the GNU/GCC coding style?

On 28/07/2022 22:43, Iannetta Paul wrote: About configuring recent editors to follow the GNU coding style, I don't really know but it should always be possible to register a hook that will run `indent` when the file is saved. I don't think that's a good idea. It will result in quite a lot

Re: .eh_frame augmentation character for MTE stack tagging

On 04/06/2022 00:52, Florian Mayer via Gcc wrote: Hey! We are in the process of implementing MTE (Memory Tagging Extension) stack tagging in LLVM. To support stack tagging in combination with exceptions, we need to make sure that the unwinder will untag stack frames, to avoid leaving behind s

Re: gnatlink vs. -mthumb -march=armv7-a+simd -mfloat-abi=hard

On 28/04/2022 09:16, Sebastian Huber wrote: /opt/rtems/7/lib/gcc/arm-rtems7/12.0.1/thumb/armv7-a+simd/hard/adainclude/s-secsta.ads:288:9: sorry, unimplemented: Thumb-1 'hard-float' VFP ABI Does that source file somehow attempt to change the architecture on that line? This looks like someth

Re: Urgent GCC ABI backend maintainer ping re zero width bitfield passing (PR102024)

On 25/03/2022 14:47, Jakub Jelinek via Gcc wrote: On Fri, Mar 25, 2022 at 02:26:56PM +, Richard Earnshaw wrote: Just to confirm that this is our final position. The 'int:0 field should be ignored for the purposes of determining the parameter passing as it has no effect on the layout of t

Re: Urgent GCC ABI backend maintainer ping re zero width bitfield passing (PR102024)

On 22/03/2022 16:28, Richard Earnshaw via Gcc wrote: On 21/03/2022 16:28, Jakub Jelinek via Gcc wrote: Hi! I'd like to ping port maintainers about https://gcc.gnu.org/PR102024 As I wrote, the int : 0 bitfields are present early in the TYPE_FIELDS during structure layout and intentio

Re: Urgent GCC ABI backend maintainer ping re zero width bitfield passing (PR102024)

On 22/03/2022 16:51, Jakub Jelinek via Gcc wrote: On Tue, Mar 22, 2022 at 04:28:08PM +, Richard Earnshaw wrote: Unless I've missed something subtle here, the layout of struct S { float a; int : 0; float b;}; is going to identical to struct T { float a; float b;}; on pretty much

Re: Urgent GCC ABI backend maintainer ping re zero width bitfield passing (PR102024)

On 21/03/2022 16:28, Jakub Jelinek via Gcc wrote: Hi! I'd like to ping port maintainers about https://gcc.gnu.org/PR102024 As I wrote, the int : 0 bitfields are present early in the TYPE_FIELDS during structure layout and intentionally affect the layout. We had some code to remove those from

Re: what is the difference with and without crc extension support

On 03/03/2022 13:41, Dongjiu Geng via Gcc wrote: Hi, My program does not use CRC instructions，but I find the compiled binary has much difference between using "-march=armv8-a+crc" and using "-march=armv8-a". Even stranger, when I use "-march=armv8-a+crc", I find my compiled binary can not r

Re: ARM Cortex-R5F Support

On 01/03/2022 16:23, Kinsey Moore wrote: Hi, I'm looking at working on Cortex-R5F support for RTEMS, but it seems as if latest GCC supports the Cortex-R5. This R5 has implicit FPU support which would make it really R5F. The ARM reference page on this core (https://developer.arm.com/Process

Re: Benchmark recommendations needed

Dhrystone is (and probably always was) a bogus benchmark. It's a well-known truism that MIPS stands for Meaningless Indication of Processor Speed, and dhrystone scores are equally meaningless. Dhrystone fell out of common usage over 20 years ago. It's not GCC that is being peculiar, it's just

Re: [ANNOUNCEMENT] Mass rename of C++ .c files to .cc suffix is going to happen on Jan 17 evening UTC TZ

On 17/01/2022 21:41, Martin Liška wrote: On 1/13/22 12:01, Martin Liška wrote: Hello. Based on the discussion with release managers, the change is going to happen after stage4 begins. Martin Hi. The renaming patches have been just installed and I've built a few target compilers so far

Re: Help with an ABI peculiarity

On 10/01/2022 08:38, Florian Weimer via Gcc wrote: * Jeff Law via Gcc: Most targets these days use registers for parameter passing and obviously we can run out of registers on all of them.  The key property is the size/alignment of the argument differs depending on if it's pass in a register

Re: Labelling of regressions in Bugzilla

On 15/12/2021 11:39, Jonathan Wakely via Gcc wrote: On IRC we've been discussing some changes to Bugzilla that would give a bit more structure to how we label and process regressions. Currently we add something like "[9/10/11/12 Regression]" to the start of the summary, and then edit that whe

Re: How to describe ‘earlyclobber’ explicitly for specific source operand ?

On 22/11/2021 06:40, Jojo R via Gcc wrote: — Jojo 在 2021年11月20日 +0800 AM6:11，Peter Bergner ，写道： On 11/19/21 1:28 AM, Jojo R via Gcc wrote: We know gcc supply earlyclobber function to avoid register overlap, but it can not describe explicitly for specific source operand, is it right ? You

Re: Can gcc.dg/torture/pr67828.c be an infinite loop?

On 24/09/2021 10:29, Andrew Pinski via Gcc wrote: On Fri, Sep 24, 2021 at 1:05 AM Aldy Hernandez via Gcc wrote: Hi folks. My upcoming threading improvements turn the test below into an infinite runtime loop: int a, b; short c; int main () { int j, d = 1; for (; c >= 0; c++)

Re: [FYI] bugzilla cleanup

On 16/09/2021 16:44, Martin Sebor via Gcc wrote: On 9/14/21 2:10 AM, Andrew Pinski via Gcc wrote: Hi all,    I am doing some bugzilla cleanup.  This includes disabling some components and some versions for new bugs. So far I have disabled versions before GCC 4 because we have not had a report

Re: ARM32 configury changes, with no FPU as a default

On 17/09/2021 11:23, Florian Weimer via Gcc wrote: * Matthias Klose: Starting with GCC 8, the configury allows to encode extra features into the architecture string. Debian and Ubuntu's armhf (hard float) architecture is configured with --with-arch=armv7-a --with-fpu=vfpv3-d16 and now s

Re: [RFC] Adding a new attribute to function param to mark it as constant

On 06/08/2021 01:06, Martin Sebor via Gcc wrote: On 8/4/21 3:46 AM, Richard Earnshaw wrote: On 03/08/2021 18:44, Martin Sebor wrote: On 8/3/21 4:11 AM, Prathamesh Kulkarni via Gcc wrote: On Tue, 27 Jul 2021 at 13:49, Richard Biener wrote: On Mon, Jul 26, 2021 at 11:06 AM Prathamesh Kul

Re: [RFC] Adding a new attribute to function param to mark it as constant

On 04/08/2021 18:59, Segher Boessenkool wrote: > On Wed, Aug 04, 2021 at 07:08:08PM +0200, Florian Weimer wrote: >> * Segher Boessenkool: >> >>> On Wed, Aug 04, 2021 at 03:27:00PM +0100, Richard Earnshaw wrote: On 04/08/2021 14:40, Segher Boessenkool wrote: > On Wed, Aug 04, 2021 at 02:00:

Re: [RFC] Adding a new attribute to function param to mark it as constant

On 04/08/2021 14:40, Segher Boessenkool wrote: On Wed, Aug 04, 2021 at 02:00:42PM +0100, Richard Earnshaw wrote: We don't want to have to resort to macros. Not least because at some point we want to replace the content of arm_neon.h with a single #pragma directive to remove all the parsing o

Re: [RFC] Adding a new attribute to function param to mark it as constant

On 04/08/2021 13:46, Segher Boessenkool wrote: > On Wed, Aug 04, 2021 at 05:20:58PM +0530, Prathamesh Kulkarni wrote: >> On Wed, 4 Aug 2021 at 15:49, Segher Boessenkool >> wrote: >>> Both __builtin_constant_p and __is_constexpr will not work in your use >>> case (since a function argument is not a

Re: [RFC] Adding a new attribute to function param to mark it as constant

On 03/08/2021 18:44, Martin Sebor wrote: On 8/3/21 4:11 AM, Prathamesh Kulkarni via Gcc wrote: On Tue, 27 Jul 2021 at 13:49, Richard Biener wrote: On Mon, Jul 26, 2021 at 11:06 AM Prathamesh Kulkarni via Gcc wrote: On Fri, 23 Jul 2021 at 23:29, Andrew Pinski wrote: On Fri, Jul 23, 20

Re: [PATCH] Port GCC documentation to Sphinx

On 30/06/2021 05:47, Martin Liška wrote: On 6/29/21 12:50 PM, Richard Earnshaw wrote: On 29/06/2021 11:09, Martin Liška wrote: On 6/28/21 5:33 PM, Joseph Myers wrote: Are formatted manuals (HTML, PDF, man, info) corresponding to this patch version also available for review? I've just u

Re: [PATCH] Port GCC documentation to Sphinx

On 29/06/2021 11:09, Martin Liška wrote: On 6/28/21 5:33 PM, Joseph Myers wrote: Are formatted manuals (HTML, PDF, man, info) corresponding to this patch version also available for review? I've just uploaded them here: https://splichal.eu/gccsphinx-final/ Martin In the HTML version of t

Re: git gcc-commit-mklog doesn't extract PR number to ChangeLog

On 17/06/2021 18:21, Jakub Jelinek wrote: > On Thu, Jun 17, 2021 at 05:12:52PM +, Joseph Myers wrote: >> On Thu, 17 Jun 2021, Richard Earnshaw via Gcc wrote: >> >>> It seems a bit dangerous to me to rely on just extracting PR numbers from >>> tests. What if t

Re: git gcc-commit-mklog doesn't extract PR number to ChangeLog

On 17/06/2021 01:40, Jason Merrill via Gcc wrote: On 6/16/21 8:17 PM, Martin Sebor wrote: On 6/16/21 5:45 PM, Jason Merrill wrote: On Wed, Jun 16, 2021 at 5:46 PM Martin Sebor > wrote:     On 6/16/21 2:49 PM, Jason Merrill wrote: > On 6/15/21 11:42 PM, Jason Me

Re: Build failure in fixincludes on x86_64

On 26/05/2021 13:22, Uros Bizjak via Gcc wrote: The build currently fails to build for me on x86_64 in fixincludes: /home/uros/gcc-build/./gcc/xgcc -B/home/uros/gcc-build/./gcc/ -B/usr/local/x86_64-pc-linux-gnu/bin/ -B/usr/local/x86_64-pc-linux-gnu/lib/ -isystem /usr/local/x86_64-pc-linux-gnu

Re: "musttail" statement attribute for GCC?

On 26/04/2021 14:49, Iain Sandoe via Gcc wrote: Alexander Monakov wrote: On Fri, 23 Apr 2021, Josh Haberman via Gcc wrote: On Fri, Apr 23, 2021 at 1:10 PM Iain Sandoe wrote: I did try to use it this ^ for GCC coroutines (where such a guarantee is pretty important) However, the issue t

Re: why aarch64 doesn't support V4QI.

On 15/12/2020 14:26, 172060...@hdu.edu.cn wrote: > Hi, > > I have some problems in gcc development about aarch64. I saw it doesn't > support > V4QI machine mode in aarch64-modes.def, but it has V4QI in arm-modes.def. > > I want to know why it doesn't? > > I am looking forward your replies. Tha

Re: [RFC] Increase libstdc++ line length to 100(?) columns

On 29/11/2020 17:38, Florian Weimer wrote: > * Allan Sandfeld Jensen: > >> If you _do_ change it. I would suggest changing it to 120, which is next >> common step for a lot of C++ projects. > > 120 can be problematic for a full HD screen in portrait mode. Nine > pixels per character is not a lo

Re: Disassemble the .lib file compiled with gcc-arm-8.3-2019.03-x86_64-arm-eabi compilation tool chain, and found that malloc is optimized to calloc.

On 30/10/2020 08:53, YaRu Wei(魏亚茹) wrote: > Dear gcc: > I find that disassemble the .lib file compiled with > gcc-arm-8.3-2019.03-x86_64-arm-eabi compilation tool chain, and found that > malloc is optimized to calloc. I want to know under what circumstances malloc > will be optimized to calloc?