Re: Register Pressure in Instruction Level Parallelism

2009-06-29 Thread Michael Kruse
Vladimir Makarov schrieb: Michael Kruse wrote: In the thesis, a modified Poletto algorithm is presented to add spill code. I've just checked the thesis again. I don't think decreasing register pressure through spilling will work well. First of all Polleto linear scan RA is

Re: Register Pressure in Instruction Level Parallelism

2009-06-29 Thread Michael Kruse
Vladimir Makarov wrote: Michael Kruse wrote: If the register sufficiency is higher than the physical number of registers, spill code is added to the graph. For me, that is the most interesting part, unfortunately Touti (as I remember) in his thesis say practically nothing about this. In

Re: Register Pressure in Instruction Level Parallelism

2009-06-28 Thread Michael Kruse
It might also be interesting for my advisor and the professor. Otherwise, we might end up in doing redundant work. Btw, if it is a free compiler, why not telling us which one? Regards, Michael Kruse -- Tardyzentrismus verboten! smime.p7s Description: S/MIME Cryptographic Signature

Re: Register Pressure in Instruction Level Parallelism

2009-06-28 Thread Michael Kruse
ism :-) Btw, I guess my advisor doesn't accept your argument. The dragon on my dragon book is a very tough one *g*. And one of my advisor's arguments for not implementing it for the GCC is that their compiler would be less complicated. I can't confirm that since I don't hav

Register Pressure in Instruction Level Parallelism

2009-06-28 Thread Michael Kruse
efer to implement this for the gcc, but my advisor wants me to do it for the university's own compiler. Therefore I could also need arguments why to do it for the GCC. Regards, Michael Kruse [1] http://www.prism.uvsq.fr/~touati/thesis.html [2] http://tel.archives-ouvertes.fr/docs/00/04/72