On 02/23/2011 09:52 PM, Christian Grössler wrote:
> Hello,
>
> I have a problem with register allocation. Our architecture has some
> pointer registers "pX" (24bit)
> and some data registers "dX" (32bit). Since pointers are only 24bit,
> we're using PSImode for them.
>
> There are restrictions in
On 02/09/2011 08:27 AM, Hans-Peter Nilsson wrote:
> On Fri, 28 Jan 2011, Jean-Marc Saffroy wrote:
>> (define_constraint "I"
>> "Signed 6-bit integer constant for binops."
>> (and (match_code "const_int")
>>(match_test "IN_
On 01/28/2011 09:45 PM, Ian Lance Taylor wrote:
> Jean-Marc Saffroy writes:
>
>> On 01/28/2011 06:44 PM, Ian Lance Taylor wrote:
>>> Jean-Marc Saffroy writes:
>>>
>>>> error: insn does not satisfy its constraints:
>>>> (insn 1424 1423 141
On 01/28/2011 06:44 PM, Ian Lance Taylor wrote:
> Jean-Marc Saffroy writes:
>
>> error: insn does not satisfy its constraints:
>> (insn 1424 1423 141 (set (reg:DI 2 r2)
>> (plus:DI (reg:DI 2 r2)
>> (const_int 40 [0x28])))
>> /home/j
Hi gcc gurus,
I'm trying to port GCC to a new architecture, I'm new to gcc, and have
little problems defining add correctly.
My target has 2 types of (DI mode) registers, so I defined 2 classes:
- class D (data) regs can be used for computations, and that includes
operations such as additions an
