Multiple types of load/store: how to create .md rules?

2022-05-02 Thread Andras Tantos
All, Thanks for all the help from the past. I'm (still) working on porting GCC to a new processor ISA and ran into the following problem: the CPU supports two kinds of register+offset based loads (and stores). The generic format accepts any base register and any offset. The syntax for this type o

Re: Benchmark recommendations needed

2022-02-21 Thread Andras Tantos
That's true, I did notice GCC being rather ... peculiar about drhystone. Is there a way to make it less clever about the benchmark? Or is there some alteration to the benchmark I can make to not trigger the special behavior in GCC? Andras On Mon, 2022-02-21 at 03:19 +, Gary Oblock via Gcc wr

Benchmark recommendations needed

2022-02-15 Thread Andras Tantos
Hello all! I'm working on porting GCC to a new processor architecture. I think I've finally got to a fairly stable stage, so the next logical step would be to test and optimize. For that, I would need some benchmarks, and this is where I'm seeking your help. This being a hobby project, I can't sh

Re: How to generate a call inst. sequence?

2022-01-20 Thread Andras Tantos
On Wed, 2022-01-19 at 10:45 +, Richard Sandiford wrote: > Andras Tantos writes: > > All, > > > > I'm working on porting GCC to a processor architecture that doesn't > > have > > a (HW) stack nor a call instruction. This means that for calls

How to generate a call inst. sequence?

2022-01-18 Thread Andras Tantos
All, I'm working on porting GCC to a processor architecture that doesn't have a (HW) stack nor a call instruction. This means that for calls, I need to generate the following instruction sequence:     // move stack-pointer:     $sp <- $sp-4     // load return address:     $r3 <- return_label

Re: What's wrong with this RTL?

2022-01-10 Thread Andras Tantos
On Sun, 2022-01-09 at 22:19 -0800, Andrew Pinski wrote: > On Sun, Jan 9, 2022 at 8:49 PM Andras Tantos > wrote: > > All! > > > > I'm trying to port GCC to a new target, I call 'brew'. I've based > > it on > > the Moxie target mostly becaus

What's wrong with this RTL?

2022-01-09 Thread Andras Tantos
All! I'm trying to port GCC to a new target, I call 'brew'. I've based it on the Moxie target mostly because of it's simplicity. I must be doing something horribly wrong as the following C code crokes in the LRA path: long long foo (long long a, long long *w) { return __builtin_add_ov

Re: Why doesn't this pattern match?

2022-01-07 Thread Andras Tantos
Thanks for the help, that's exactly it! Andras On Thu, 2022-01-06 at 20:25 -0800, Andrew Pinski wrote: > On Thu, Jan 6, 2022 at 8:13 PM Andras Tantos > wrote: > > Hello! > > > > My name is Andras Tantos and I just joined this list, so if I'm > > asking

Why doesn't this pattern match?

2022-01-06 Thread Andras Tantos
Hello! My name is Andras Tantos and I just joined this list, so if I'm asking something off-topic or not following the rules of the community, please let me know. What I'm working on is to port GCC (and Binutils) to a new CPU ISA, I call 'brew'. During developing for th