On 14.05.24 08:03, Sebastian Huber wrote:
Hello,
the ZynqMP APU RAM start addresses are far away from 0x0:
Sorry, I selected the wrong mailing list.
--
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Herr Sebastian HUBER
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email: sebastian.hu...@embedded-brains.de
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Hello,
the ZynqMP APU RAM start addresses are far away from 0x0:
cat spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyri
On Wed, 8 May 2024 21:40:44 +0200
Jakub Jelinek wrote:
> Perhaps you don't link cobol1 with the correct make variables
> as other FEs are linked?
First, thank you for the careful answer. It allowed me to trace
through the machinery. And I confirmed that it works, usually.
The Make-lang.in f
> On 13 May 2024, at 19:43, Iain Sandoe wrote:
>
>
>
>> On 13 May 2024, at 18:46, Richard Biener wrote:
>>
>> On Mon, May 13, 2024 at 6:00 PM Iain Sandoe wrote:
>>>
>>>
>>>
On 13 May 2024, at 16:05, Iain Sandoe via Gcc wrote:
> On 30 Aug 2023, at 00:32, Ben Boeckel via Gcc w
> On 13 May 2024, at 18:46, Richard Biener wrote:
>
> On Mon, May 13, 2024 at 6:00 PM Iain Sandoe wrote:
>>
>>
>>
>>> On 13 May 2024, at 16:05, Iain Sandoe via Gcc wrote:
On 30 Aug 2023, at 00:32, Ben Boeckel via Gcc wrote:
On Tue, Aug 29, 2023 at 18:57:37 +0200, Richard
On Mon, May 13, 2024 at 6:00 PM Iain Sandoe wrote:
>
>
>
> > On 13 May 2024, at 16:05, Iain Sandoe via Gcc wrote:
> >> On 30 Aug 2023, at 00:32, Ben Boeckel via Gcc wrote:
> >>
> >> On Tue, Aug 29, 2023 at 18:57:37 +0200, Richard Biener wrote:
> >>> I suppose for bootstrapping we could disable I
Hello.
This is a draft FDPIC ABI specification for the Xtensa architecture.
Please send comments. I will be implementing the final ABI version in
gcc and binutils.
The Xtensa FDPIC ABI
April 8, 2024
Version 1
Bas
> On 13 May 2024, at 16:05, Iain Sandoe via Gcc wrote:
>> On 30 Aug 2023, at 00:32, Ben Boeckel via Gcc wrote:
>>
>> On Tue, Aug 29, 2023 at 18:57:37 +0200, Richard Biener wrote:
>>> I suppose for bootstrapping we could disable ISL during stage1 since
>>> it enables an optional feature only.
This
> On 30 Aug 2023, at 00:32, Ben Boeckel via Gcc wrote:
>
> On Tue, Aug 29, 2023 at 18:57:37 +0200, Richard Biener wrote:
>> I suppose for bootstrapping we could disable ISL during stage1 since
>> it enables an optional feature only. Other than that GCC only
>> requires a C++11 compiler fo