On Thu, 2023-07-27 at 15:11 +0200, Georg-Johann Lay wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
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>
> Am 17.07.23 um 13:33 schrieb SenthilKumar.Selvaraj--- via Gcc:
> > Hi,
> >
> >The avr target has a bunch of patterns that directly set
On Thu, Jul 27, 2023 at 7:11 PM chuanqi.xcq via Gcc wrote:
>
> Hi,
> We're discussing to implement `-fno-coroutines` in clang so that we can
> disable the coroutine feature with C++ standard higher than 20.
> A full discussion can be found here: https://reviews.llvm.org/D156247. A
> major motiv
Hi,
We're discussing to implement `-fno-coroutines` in clang so that we can
disable the coroutine feature with C++ standard higher than 20.
A full discussion can be found here: https://reviews.llvm.org/D156247. A major
motivation for us to do this is to keep consistency with GCC.
However, we don
On 7/23/23 20:26, Ben Boeckel wrote:
On Fri, Jul 21, 2023 at 16:23:07 -0400, Nathan Sidwell wrote:
It occurs to me that the model I am envisioning is similar to CMake's object
libraries. Object libraries are a convenient name for a bunch of object files.
IIUC they're linked by naming the indivi
Snapshot gcc-11-20230727 is now available on
https://gcc.gnu.org/pub/gcc/snapshots/11-20230727/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 11 git branch
with the following options: git://gcc.gnu.org/git/gcc.git branch
On Thu, 2023-07-27 at 18:13 -0400, Eric Feng wrote:
> Hi Dave,
>
> Thanks for the comments!
>
> [...]
> > Do you have any DejaGnu tests for this functionality? For example,
> > given PyList_New
> > https://docs.python.org/3/c-api/list.html#c.PyList_New
> > there could be a test like:
> >
> >
Hi Dave,
Thanks for the comments!
[...]
> Do you have any DejaGnu tests for this functionality? For example,
> given PyList_New
> https://docs.python.org/3/c-api/list.html#c.PyList_New
> there could be a test like:
>
> /* { dg-require-effective-target python_h } */
>
> #define PY_SSIZE_T_CLEAN
Hey,
On Thu, 27 Jul 2023, Thomas Koenig via Gcc wrote:
> Intel recommends to have the new registers as caller-saved for
> compatibility with current calling conventions. If I understand this
> correctly, this is required for exception unwinding, but not if the
> function called is __attribute__(
Am 17.07.23 um 13:33 schrieb SenthilKumar.Selvaraj--- via Gcc:
Hi,
The avr target has a bunch of patterns that directly set hard regs at expand
time, like so
The correct approach would be to use usual predicates together with
constraints that describe the register instead of hard regs,
* Thomas Koenig via Gcc:
> Intel recommends to have the new registers as caller-saved for
> compatibility with current calling conventions. If I understand this
> correctly, this is required for exception unwinding, but not if the
> function called is __attribute__((nothrow)).
Nothrow functions
> On Jul 27, 2023, at 7:50 AM, Maciej W. Rozycki wrote:
>
> On Fri, 14 Jul 2023, Vladimir Makarov via Gcc wrote:
>
>>> On the avr, the stack pointer (SP)
>>> is not used to access stack slots
>> It is very uncommon target then.
>
> Same with the VAX target. SP is used for outgoing functi
Status
==
GCC 13.2 has been released, the releases/gcc-13 branch is open again
for regression and documentation bugfixing. GCC 13.3 can be expected
in spring next year unless something serious changes the plans.
Quality Data
Priority # Change from last report
--
On Fri, 14 Jul 2023, Vladimir Makarov via Gcc wrote:
> > On the avr, the stack pointer (SP)
> >is not used to access stack slots
> It is very uncommon target then.
Same with the VAX target. SP is used for outgoing function arguments,
function calls, alloca only. AP is used for incoming
The GNU Compiler Collection version 13.2 has been released.
GCC 13.2 is the first bug-fix release from the GCC 13 branch containing
important fixes for regressions and serious bugs in GCC 13.1 with more
than 58 bugs fixed since the previous release.
This release is available from the WWW servers
With the upcoming Intel APX extension, Intel processors will
finally gain 32 general-purpose registers and three-operand
arithmetic, see
https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html
Intel recommends to have the new registers as cal
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