Hello all,
I am a 2nd year Master's student at IIT Bombay. The project "Make C/C++
not automatically promote memory_order_consume to memory_order_acquire"
caught my eye and I would like to be the part of it. I have taken
advance compiler courses in past semesters. I have already build gcc and
On Mon, Feb 18, 2019 at 11:15 AM Warren D Smith wrote:
>
> There are a lot of weird intel vector instructions like
> #include
>
> __m128i alignas(16) A, B, C, D, X, Y;
> A = _mm_shuffle_epi8(D, Y);
> C = _mm_unpackhi_epi16(A, B);
> where my gcc seems to know about the latter but not the former
>
There are a lot of weird intel vector instructions like
#include
__m128i alignas(16) A, B, C, D, X, Y;
A = _mm_shuffle_epi8(D, Y);
C = _mm_unpackhi_epi16(A, B);
where my gcc seems to know about the latter but not the former
(I have no idea why, and it is very annoying to arbitrarily support the s
I have a question about constraint usage in inline asm when we have
an early clobber output operand. The test case is from PR89313 and
looks like the code below (I'm using "r3" for the reg on ppc, but
you could also use "rax" on x86_64, etc.).
long input;
long
bug (void)
{
register long output
Hello Shubham,
On Sun, Feb 10 2019, Shubham Narlawar wrote:
> Hi,
>
> I am Shubham Narlawar. Currently, I am a Computer Engineering undergrad
> student at Pune University, India. I am interested in contributing to GCC
> for GSOC 2019.
>
> We have done a project from GCC GSOC 2018 idea list which i
Hello Sameeran,
On Sun, Feb 10 2019, sameeran joshi wrote:
> Hi,I am an undergraduate student currently in final year of computer
> science and engineering degree course from Pune University, India. I
> and Shubham have been working on Last year's GSoC project idea :
>
> Implement a fuzzer leverag
