RE: About gsoc 2014 OpenMP 4.0 Projects

2014-02-25 Thread Evgeny Gavrin
Hi Guray, There were two announcements: PTX-backend and OpenCL code generation. Initial PTX-patches can be found in mailing list and OpenCL experiments in openacc_1-0_branch. Regarding GSoC it would be nice, if you'll apply with your proposal on code generation. I think that projects aimed to imp

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread Paul E. McKenney
On Tue, Feb 25, 2014 at 10:06:53PM -0500, George Spelvin wrote: > wrote: > > wrote: > >> I have for the last several years been 100% convinced that the Intel > >> memory ordering is the right thing, and that people who like weak > >> memory ordering are wrong and should try to avoid reproducing i

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread Paul E. McKenney
On Tue, Feb 25, 2014 at 08:32:38PM -0700, Jeff Law wrote: > On 02/25/14 17:15, Paul E. McKenney wrote: > >>I have for the last several years been 100% convinced that the Intel > >>memory ordering is the right thing, and that people who like weak > >>memory ordering are wrong and should try to avoid

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread Paul E. McKenney
On Tue, Feb 25, 2014 at 05:47:03PM -0800, Linus Torvalds wrote: > On Mon, Feb 24, 2014 at 10:00 PM, Paul E. McKenney > wrote: > > > > So let me see if I understand your reasoning. My best guess is that it > > goes something like this: > > > > 1. The Linux kernel contains code that passes poi

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread Jeff Law
On 02/25/14 17:15, Paul E. McKenney wrote: I have for the last several years been 100% convinced that the Intel memory ordering is the right thing, and that people who like weak memory ordering are wrong and should try to avoid reproducing if at all possible. But given that we have memory orderin

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread George Spelvin
wrote: > wrote: >> I have for the last several years been 100% convinced that the Intel >> memory ordering is the right thing, and that people who like weak >> memory ordering are wrong and should try to avoid reproducing if at >> all possible. > > Are ARM and Power really the bad boys here? Or

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread Linus Torvalds
On Mon, Feb 24, 2014 at 10:00 PM, Paul E. McKenney wrote: > > So let me see if I understand your reasoning. My best guess is that it > goes something like this: > > 1. The Linux kernel contains code that passes pointers from > rcu_dereference() through external functions. No, actual

Re: [RFC][PATCH 0/5] arch: atomic rework

2014-02-25 Thread Paul E. McKenney
On Mon, Feb 24, 2014 at 10:05:52PM -0800, Linus Torvalds wrote: > On Mon, Feb 24, 2014 at 3:35 PM, Linus Torvalds > wrote: > > > > Litmus test 1: > > > > p = atomic_read(pp, consume); > > if (p == &variable) > > return p->val; > > > >is *NOT* ordered > > Btw, don't get me wron

RE: [RFC] Introducing MIPS O32 ABI Extension for FR0 and FR1 Interlinking

2014-02-25 Thread Matthew Fortune
> Matthew Fortune writes: > >> >> If we do end up using ELF flags then maybe adding two new > >> >> EF_MIPS_ABI enums would be better. It's more likely to be trapped > >> >> by old loaders and avoids eating up those precious remaining bits. > >> > > >> > Sound's reasonable but I'm still trying to

[GSoC] GCC has been accepted to GSoC 2014

2014-02-25 Thread Maxim Kuvyrkov
Hi All, GCC has been accepted as mentoring organization to Google Summer of Code 2014, and we are off to the races! If you want to be a GCC GSoC student check out the project idea page at http://gcc.gnu.org/wiki/SummerOfCode . Feel free to ask questions on IRC [1] and get in touch with your p

Re: [RFC] Introducing MIPS O32 ABI Extension for FR0 and FR1 Interlinking

2014-02-25 Thread Richard Sandiford
Matthew Fortune writes: > That sounds OK to me. > > I'm aiming to have an experimental implementation of the calling > convention changes as soon as possible although I am having difficulties > getting the frx calling convention working correctly. > > The problem is that frx needs to treat registe

Re: [RFC] Introducing MIPS O32 ABI Extension for FR0 and FR1 Interlinking

2014-02-25 Thread Richard Sandiford
Matthew Fortune writes: >> >> If we do end up using ELF flags then maybe adding two new EF_MIPS_ABI >> >> enums would be better. It's more likely to be trapped by old loaders >> >> and avoids eating up those precious remaining bits. >> > >> > Sound's reasonable but I'm still trying to determine h

About gsoc 2014 OpenMP 4.0 Projects

2014-02-25 Thread guray ozen
Hello, I'm master student at high-performance computing at barcelona supercomputing center. And I'm working on my thesis regarding openmp accelerator model implementation onto our compiler (OmpSs). Actually i almost finished implementation of all new directives to generate CUDA code and same impl

RE: [RFC] Introducing MIPS O32 ABI Extension for FR0 and FR1 Interlinking

2014-02-25 Thread Matthew Fortune
Richard Sandiford writes > Doug Gilmore writes: > > On 02/24/2014 10:42 AM, Richard Sandiford wrote: > >>... > >>> AIUI the old form never really worked reliably due to things like > >>> newlib's setjmp not preserving the odd-numbered registers, so it > >>> doesn't > seem worth keeping aroun

Re: [RFC] Introducing MIPS O32 ABI Extension for FR0 and FR1 Interlinking

2014-02-25 Thread Richard Sandiford
Doug Gilmore writes: > On 02/24/2014 10:42 AM, Richard Sandiford wrote: >>... >>> AIUI the old form never really worked reliably due to things like >>> newlib's setjmp not preserving the odd-numbered registers, so it doesn't seem worth keeping around. Also, the old form is identified by the