On Wed, Jul 24, 2013 at 07:36:31PM +0200, Richard Biener wrote:
> >Make them callee saved means we need to change ld.so to
> >preserve them and we need to change unwind library to
> >support them. It is certainly doable.
>
> IMHO it was a mistake to not have any callee saved xmm register in the
>
On Wed, Jul 24, 2013 at 4:36 PM, Roland McGrath wrote:
>
> Will an MPX-using binary require an MPX-supporting dynamic linker to run
> correctly?
>
> * An old dynamic linker won't clobber %bndN directly, so that's not a
> problem.
These are my answers and likely incorrect.
It will clobber the r
I've read through the MPX spec once, but most of it is still not very
clear to me. So please correct any misconceptions. (HJ, if you answer
any or all of these questions in your usual style with just, "It's not a
problem," I will find you and I will kill you. Explain!)
Will an MPX-using binary
On Wed, Jul 24, 2013 at 8:50 AM, Andrew Haley wrote:
> Not at all: we're just disagreeing about what a real system with
> a real workload looks like.
No, we aren't. We're disagreeing about whether it's acceptable to
enable a feature by default that breaks the compiler build half way
through with
I have uploaded all the videos we recorded at the Cauldron to
the workshop page (http://gcc.gnu.org/wiki/cauldron2013).
The videos are also available at the YouTube playlist:
http://www.youtube.com/playlist?list=PLsgS8fWwKJZhrjVEN7tsQyj2nLb5z0n70
If you think your talk was recorded but you do no
On Wed, Jul 24, 2013 at 10:55 AM, Peter Bergner wrote:
> On Wed, 2013-07-24 at 10:42 -0700, H.J. Lu wrote:
>> Are there any other Linux targets with callee saved vector registers?
>
> Yes, on POWER. From our ABI:
>
> On processors with the VMX feature.
> v0-v1 Volatile scratch registers
>
On Wed, Jul 24, 2013 at 11:59 AM, Ian Lance Taylor wrote:
> On Wed, Jul 24, 2013 at 11:53 AM, H.J. Lu wrote:
>> On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor wrote:
>>> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
http://software.intel.com/sites/default/files/319433-015.pdf
>>
On Wed, Jul 24, 2013 at 11:53 AM, H.J. Lu wrote:
> On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor wrote:
>> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
>>>
>>> http://software.intel.com/sites/default/files/319433-015.pdf
>>>
>>> introduces 4 bound registers, which will be used for parame
On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor wrote:
> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
>>
>> http://software.intel.com/sites/default/files/319433-015.pdf
>>
>> introduces 4 bound registers, which will be used for parameter passing
>> in x86-64. Bound registers are cleared by
On Wed, Jul 24, 2013 at 08:25:14AM -1000, Richard Henderson wrote:
> On 07/24/2013 05:23 AM, Richard Biener wrote:
> > "H.J. Lu" wrote:
> >
> >> Hi,
> >>
> >> Here is a patch to extend x86-64 psABI to support AVX-512:
> >
> > Afaik avx 512 doubles the amount of xmm registers. Can we get them cal
On 07/24/2013 05:23 AM, Richard Biener wrote:
> "H.J. Lu" wrote:
>
>> Hi,
>>
>> Here is a patch to extend x86-64 psABI to support AVX-512:
>
> Afaik avx 512 doubles the amount of xmm registers. Can we get them callee
> saved please?
Having them callee saved pre-supposes that one knows the widt
Problem solved.
The trouble was that the blocks of my statement list weren't correctly
chained, so when lower_gimple_bind executed in pass_lower_cf, it
accessed an uninitialized memory area, thus sometimes reading the flag
as true and sometimes as false. Now everything runs smoothly.
Again, thank
On Wed, Jul 24, 2013 at 07:36:31PM +0200, Richard Biener wrote:
> "H.J. Lu" wrote:
>
> >On Wed, Jul 24, 2013 at 8:23 AM, Richard Biener
> > wrote:
> >> "H.J. Lu" wrote:
> >>
> >>>Hi,
> >>>
> >>>Here is a patch to extend x86-64 psABI to support AVX-512:
> >>
> >> Afaik avx 512 doubles the amount
On Wed, 2013-07-24 at 10:42 -0700, H.J. Lu wrote:
> Are there any other Linux targets with callee saved vector registers?
Yes, on POWER. From our ABI:
On processors with the VMX feature.
v0-v1 Volatile scratch registers
v2-v13 Volatile vector parameters registers
v14-v19 Volatile s
On Wed, Jul 24, 2013 at 10:36 AM, Richard Biener
wrote:
> "H.J. Lu" wrote:
>
>>On Wed, Jul 24, 2013 at 8:23 AM, Richard Biener
>> wrote:
>>> "H.J. Lu" wrote:
>>>
Hi,
Here is a patch to extend x86-64 psABI to support AVX-512:
>>>
>>> Afaik avx 512 doubles the amount of xmm registers.
"H.J. Lu" wrote:
>On Wed, Jul 24, 2013 at 8:23 AM, Richard Biener
> wrote:
>> "H.J. Lu" wrote:
>>
>>>Hi,
>>>
>>>Here is a patch to extend x86-64 psABI to support AVX-512:
>>
>> Afaik avx 512 doubles the amount of xmm registers. Can we get them
>callee saved please?
>>
>
>Make them callee saved m
On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
>
> http://software.intel.com/sites/default/files/319433-015.pdf
>
> introduces 4 bound registers, which will be used for parameter passing
> in x86-64. Bound registers are cleared by branch instructions. Branch
> instructions with BND prefix will
Hi All!
This is to let you know that enabling of Intel® MPX technology (see details in
http://download-software.intel.com/sites/default/files/319433-015.pdf) in GCC
has been started. (Corresponding changes in binutils are here -
http://sourceware.org/ml/binutils/2013-07/msg00233.html)
Currentl
On 07/24/2013 04:38 PM, Gabriel Dos Reis wrote:
> On Wed, Jul 24, 2013 at 8:44 AM, Andrew Haley wrote:
>> On 07/24/2013 01:36 PM, Gabriel Dos Reis wrote:
There is no resistance whatsoever to making it work with real systems
and real workloads.
>>>
>>> It does not sound or look like that
On Wed, Jul 24, 2013 at 8:44 AM, Andrew Haley wrote:
> On 07/24/2013 01:36 PM, Gabriel Dos Reis wrote:
>>> There is no resistance whatsoever to making it work with real systems
>>> and real workloads.
>>
>> It does not sound or look like that way.
>>
>>> The problem is that you don't know that pe
On Wed, 24 Jul 2013, H.J. Lu wrote:
> > Afaik avx 512 doubles the amount of xmm registers. Can we get them
> > callee saved please?
>
> Make them callee saved means we need to change ld.so to
> preserve them and we need to change unwind library to
> support them. It is certainly doable.
And se
On Wed, Jul 24, 2013 at 8:23 AM, Richard Biener
wrote:
> "H.J. Lu" wrote:
>
>>Hi,
>>
>>Here is a patch to extend x86-64 psABI to support AVX-512:
>
> Afaik avx 512 doubles the amount of xmm registers. Can we get them callee
> saved please?
>
Make them callee saved means we need to change ld.so
On Wed, Jul 24, 2013 at 1:43 AM, Florian Weimer wrote:
> On 07/23/2013 09:49 PM, H.J. Lu wrote:
>>
>> 2. Extend the current 16-byte PLT entry:
>>
>>ff 25 32 8b 21 00jmpq *name@GOTPCREL(%rip)
>>68 00 00 00 00 pushq $index
>>e9 00 00 00 00 jmpq PLT0
>>
"H.J. Lu" wrote:
>Hi,
>
>Here is a patch to extend x86-64 psABI to support AVX-512:
Afaik avx 512 doubles the amount of xmm registers. Can we get them callee saved
please?
Thanks,
Richard.
>http://software.intel.com/sites/default/files/319433-015.pdf
>
>
>--
>H.J.
Hi all,
I find a strange things: Whether DIE(Debug Information Entry) of a
"static const int" member in a class has the attribute
"DW_AT_const_value" depends on whether there is a virtual function
defined in the class. Is it a expected behavior for GCC? And the
attribute "DW_AT_const_value" matter
Hi!
OpenMP defines a canonical loop form (in OpenMP 4: »2.6 Canonical Loop
Form«, in OpenMP 3.1 as part of »2.5.1 Loop Construct«) that says that
the loop index variable »must not be modified during the execution of the
for-loop other than in incr-expr«. The following code, which violates
this wh
On 07/24/2013 01:36 PM, Gabriel Dos Reis wrote:
>> There is no resistance whatsoever to making it work with real systems
>> and real workloads.
>
> It does not sound or look like that way.
>
>> The problem is that you don't know that people
>> running on 64-bit hardware often choose to compile -
On 07/24/2013 01:26 PM, David Starner wrote:
> On Wed, Jul 24, 2013 at 4:14 AM, Andrew Haley wrote:
>> I would just install GCC's build dependencies and build with the
>> defaults.
>
> I'm glad you have infinite hard-drive space. I rather wish fewer
> developers did, as well as those infinitely f
Hi Eric,
Thank you for your interesting on this feature.
Best Regards
WeiY
在 2013-7-24，上午1:07，Eric Botcazou 写道：
>> ok, because i am not familiar with compiler implementation. So if you can
>> give me some references i will appreciate you very much. And by the way is
>> there any plan to suppor
> There is no resistance whatsoever to making it work with real systems
> and real workloads.
It does not sound or look like that way.
> The problem is that you don't know that people
> running on 64-bit hardware often choose to compile -32 and run -32
> locally.
But we know people are running
On Wed, Jul 24, 2013 at 4:14 AM, Andrew Haley wrote:
> I would just install GCC's build dependencies and build with the
> defaults.
I'm glad you have infinite hard-drive space. I rather wish fewer
developers did, as well as those infinitely fast computers they seem
to have; perhaps they would hav
On 07/24/2013 11:32 AM, David Starner wrote:
> On Wed, Jul 24, 2013 at 1:17 AM, Andrew Haley wrote:
>> On 07/24/2013 01:48 AM, David Starner wrote:
>>> I'd like to mention that I too was bit by this one on Debian. I don't
>>> have a 32-bit development environment installed; why would I? I'm
>>> bu
On Wed, Jul 24, 2013 at 1:17 AM, Andrew Haley wrote:
> On 07/24/2013 01:48 AM, David Starner wrote:
>> I'd like to mention that I too was bit by this one on Debian. I don't
>> have a 32-bit development environment installed; why would I? I'm
>> building primarily for myself, and if I did have to t
On 07/24/2013 10:04 AM, Florian Weimer wrote:
> On 07/24/2013 10:39 AM, Andrew Haley wrote:
>
>> Well, of course. It's a prerequisite for building GCC. I presume that
>> Debian has the same abilities as Fedora, where if you want to build GCC
>> you just type
>>
>>yum-builddep gcc
>>
>> and F
On 07/24/2013 10:39 AM, Andrew Haley wrote:
Well, of course. It's a prerequisite for building GCC. I presume that
Debian has the same abilities as Fedora, where if you want to build GCC
you just type
yum-builddep gcc
and Fedora installs all the build reqs for GCC.
Yes, "apt-get build-de
On 07/23/2013 09:49 PM, H.J. Lu wrote:
2. Extend the current 16-byte PLT entry:
ff 25 32 8b 21 00jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to 32-byte to add BND prefix to branch
On 07/24/2013 09:35 AM, Florian Weimer wrote:
> On 07/24/2013 10:17 AM, Andrew Haley wrote:
>> On 07/24/2013 01:48 AM, David Starner wrote:
>>> I'd like to mention that I too was bit by this one on Debian. I don't
>>> have a 32-bit development environment installed; why would I? I'm
>>> building pr
On 07/24/2013 10:17 AM, Andrew Haley wrote:
On 07/24/2013 01:48 AM, David Starner wrote:
I'd like to mention that I too was bit by this one on Debian. I don't
have a 32-bit development environment installed; why would I? I'm
building primarily for myself, and if I did have to target a 32-bit
env
On 07/24/2013 01:48 AM, David Starner wrote:
> I'd like to mention that I too was bit by this one on Debian. I don't
> have a 32-bit development environment installed; why would I? I'm
> building primarily for myself, and if I did have to target a 32-bit
> environment, I'd likely have to mess with
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