Re: h8300-elf build broken

2012-05-08 Thread Gabriel Dos Reis
On Tue, May 8, 2012 at 5:14 PM, DJ Delorie wrote: > > I assume this is a size_t vs int type problem, but the diagnostic > points to the function declaration, not to an actual binary > expression, and I can't figure out what it's complaining about: My mailer uses proportional fonts so I can't make

h8300-elf build broken

2012-05-08 Thread DJ Delorie
I assume this is a size_t vs int type problem, but the diagnostic points to the function declaration, not to an actual binary expression, and I can't figure out what it's complaining about: /greed/dj/m32c/gcc/h8300-elf/./gcc/xgcc -shared-libgcc -B/greed/dj/m32c/gcc/h8300-elf/./gcc -nostdinc++ -

Re: Register constraints + and =

2012-05-08 Thread Ian Lance Taylor
Jan Hubicka writes: >> Jan Hubicka writes: >> >> >> >> >> I can accept the issue as a matter of documentation, but I don't >> >> understand the rest. Remember that all the patterns are executed in >> >> parallel. I don't see how adding a USE in parallel could affect >> >> anything about how

Re: Register constraints + and =

2012-05-08 Thread Jan Hubicka
> Jan Hubicka writes: > > >> > >> I can accept the issue as a matter of documentation, but I don't > >> understand the rest. Remember that all the patterns are executed in > >> parallel. I don't see how adding a USE in parallel could affect > >> anything about how the operand is used. > > > >>

Re: Register constraints + and =

2012-05-08 Thread Ian Lance Taylor
Jan Hubicka writes: >> >> I can accept the issue as a matter of documentation, but I don't >> understand the rest. Remember that all the patterns are executed in >> parallel. I don't see how adding a USE in parallel could affect >> anything about how the operand is used. > >> >> >> (define_ins

Re: Register constraints + and =

2012-05-08 Thread Jan Hubicka
> > I can accept the issue as a matter of documentation, but I don't > understand the rest. Remember that all the patterns are executed in > parallel. I don't see how adding a USE in parallel could affect > anything about how the operand is used. > >> >> (define_insn "*rep_movqi" > >> >>[(s

Re: Register constraints + and =

2012-05-08 Thread Ian Lance Taylor
Jan Hubicka writes: >> "Paulo J. Matos" writes: >> >> > On 04/05/12 19:48, Ian Lance Taylor wrote: >> > >> >> The i386 rep_movqi insn is an example: >> >> >> >> (define_insn "*rep_movqi" >> >>[(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) >> >> (set (match_operand:P 0

Re: Deprecate 32-bits HP-PA for GCC 4.8?

2012-05-08 Thread Steven Bosscher
On Tue, May 8, 2012 at 1:56 PM, Ulrich Weigand wrote: > Steven Bosscher wrote: > >> 2. HP-UX 10 is also the last target that only supports SJLJ exceptions. > > Hmm, SPU also supports only SJLJ exceptions ... Then why is force_sjlj_exceptions not set for it? Ciao! Steven

Re: Register constraints + and =

2012-05-08 Thread Jan Hubicka
> "Paulo J. Matos" writes: > > > On 04/05/12 19:48, Ian Lance Taylor wrote: > > > >> The i386 rep_movqi insn is an example: > >> > >> (define_insn "*rep_movqi" > >>[(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) > >> (set (match_operand:P 0 "register_operand" "=D") > >>

Re: Register constraints + and =

2012-05-08 Thread Ian Lance Taylor
"Paulo J. Matos" writes: > On 04/05/12 19:48, Ian Lance Taylor wrote: > >> The i386 rep_movqi insn is an example: >> >> (define_insn "*rep_movqi" >>[(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) >> (set (match_operand:P 0 "register_operand" "=D") >> (plus:P (mat

Re: Deprecate 32-bits HP-PA for GCC 4.8?

2012-05-08 Thread Andrew Pinski
On Tue, May 8, 2012 at 4:56 AM, Ulrich Weigand wrote: > Steven Bosscher wrote: > >> 2. HP-UX 10 is also the last target that only supports SJLJ exceptions. > > Hmm, SPU also supports only SJLJ exceptions ... IIRC the main reason is because SJLJ exceptions produced smaller binary size. Though I w

Re: Register constraints + and =

2012-05-08 Thread Paulo J. Matos
On 04/05/12 19:48, Ian Lance Taylor wrote: The i386 rep_movqi insn is an example: (define_insn "*rep_movqi" [(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) (set (match_operand:P 0 "register_operand" "=D") (plus:P (match_operand:P 3 "register_operand" "0")

Re: i386 define_asm_attributes question

2012-05-08 Thread Jan Hubicka
> On Tue, May 8, 2012 at 1:28 AM, Jan Hubicka wrote: > > The idea here was originally to prevent LOOP instruction to get out of > > bounds. > > ASM statement even if they are single line may be arbitrary long and thus > > can > > run out of the limits. > > Arbitrary long, but interrupted by sem

Re: Deprecate 32-bits HP-PA for GCC 4.8?

2012-05-08 Thread Ulrich Weigand
Steven Bosscher wrote: > 2. HP-UX 10 is also the last target that only supports SJLJ exceptions. Hmm, SPU also supports only SJLJ exceptions ... Bye, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE ulrich.weig...@de.ibm.com

Re: Deprecate 32-bits HP-PA for GCC 4.8?

2012-05-08 Thread Michael Haubenwallner
On 05/07/2012 07:33 PM, Steven Bosscher wrote: > I think it's reasonable to assume that most users of HP-UX10 on > machines with PA-RISC 2.0 support will have upgraded to HP-UX 11.11 or > later. While this may be true indeed, ... > 4. 32-bits HP-PA uses the SOM binary object format, i.e. it is a

Re: i386 define_asm_attributes question

2012-05-08 Thread Steven Bosscher
On Tue, May 8, 2012 at 1:28 AM, Jan Hubicka wrote: > The idea here was originally to prevent LOOP instruction to get out of bounds. > ASM statement even if they are single line may be arbitrary long and thus can > run out of the limits. Arbitrary long, but interrupted by semi-colons? From the def