On Thu, Aug 4, 2011 at 4:44 PM, H.J. Lu wrote:
> On Thu, Aug 4, 2011 at 3:46 PM, Joseph S. Myers
> wrote:
>> On Thu, 4 Aug 2011, H.J. Lu wrote:
>>
>>> Here is the updated patch to get proper HOST_WIDE_INT bits and 1
>>> through a new file, opt-gen.c. OK for trunk?
>>
>> Using another generator
On Thu, Aug 4, 2011 at 3:46 PM, Joseph S. Myers wrote:
> On Thu, 4 Aug 2011, H.J. Lu wrote:
>
>> Here is the updated patch to get proper HOST_WIDE_INT bits and 1
>> through a new file, opt-gen.c. OK for trunk?
>
> Using another generator program like this can't be the best approach
> (apart from
Snapshot gcc-4.5-20110804 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.5-20110804/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.5 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches
On Thu, 4 Aug 2011, H.J. Lu wrote:
> Here is the updated patch to get proper HOST_WIDE_INT bits and 1
> through a new file, opt-gen.c. OK for trunk?
Using another generator program like this can't be the best approach
(apart from anything else, when built for the build system hwint.h should
re
On Thu, Aug 4, 2011 at 11:08 AM, H.J. Lu wrote:
> On Wed, Jul 27, 2011 at 2:23 PM, Joseph S. Myers
> wrote:
>> On Wed, 27 Jul 2011, H.J. Lu wrote:
>>
>>> ; Maximum number of mask bits in a variable.
>>> MaxMaskBits
>>> ix86_isa_flags = 64
>>>
>>> It mark ix86_isa_flags as 64bit. Any comments?
>>
> +Mark who has done size optimization tuning with FDO.
>
> On Thu, Aug 4, 2011 at 7:05 AM, Mike Hommey wrote:
> > Hi,
> >
> > We (Mozilla) are trying to get the best of the ARM toolchain for our
> > Android build. I recently built an Android Native-code Development Kit
> > with GCC 4.6.1 and bin
Did you try using FDO with -Os? FDO should make hot code parts
optimized similar to -O3 but leave other pieces optimized for size.
Using FDO with -O3 gives you the opposite, cold portions optimized
for size while the rest is optimized for speed.
FDO with -Os still optimize for size, even in hot
On Wed, Jul 27, 2011 at 2:23 PM, Joseph S. Myers
wrote:
> On Wed, 27 Jul 2011, H.J. Lu wrote:
>
>> ; Maximum number of mask bits in a variable.
>> MaxMaskBits
>> ix86_isa_flags = 64
>>
>> It mark ix86_isa_flags as 64bit. Any comments?
>
> The patch won't work as is. set_option, for example, cast
Ulrich Weigand wrote:
> Georg-Johann Lay wrote:
>
>> Trying to make named address space support work for target AVR,
>> I am facing the following problem:
>>
>> For generic AS, there are three valid base pointer registers
>> X , Y and Z.
>>
>> For the new __pgm AS, only Z is available without offs
2011/8/4 Xinliang David Li :
> +Mark who has done size optimization tuning with FDO.
>
> On Thu, Aug 4, 2011 at 7:05 AM, Mike Hommey wrote:
>> Hi,
>>
>> We (Mozilla) are trying to get the best of the ARM toolchain for our
>> Android build. I recently built an Android Native-code Development Kit
>>
Ulrich Weigand wrote:
> Georg-Johann Lay wrote:
>
>> For the following 1-liner I get an error with current trunk r177267:
>>
>> const __pgm char * pallo = "pallo";
>>
>> __pgm as a named address space qualifier.
> [snip]
>> Moreover, if a user writes a line like
>>const __pgm char * pallo = "p
+Mark who has done size optimization tuning with FDO.
On Thu, Aug 4, 2011 at 7:05 AM, Mike Hommey wrote:
> Hi,
>
> We (Mozilla) are trying to get the best of the ARM toolchain for our
> Android build. I recently built an Android Native-code Development Kit
> with GCC 4.6.1 and binutils 2.21.53, i
On Thu, Aug 04, 2011 at 05:16:25PM +0200, Richard Guenther wrote:
> -fprofile-use enables quite some optimizations that are even off for -O3
> which are -funroll-loops and -fpeel-loops, -ftracer and -funswitch-loops.
> Those will all be increasing code-size (hopefully only for hot code pieces
> tho
DJ Delorie wrote:
> > The only target supporting named address spaces today is spu-elf,
>
> m32c-elf does too.
Huh, I totally missed that, sorry ...
Bye,
Ulrich
--
Dr. Ulrich Weigand
GNU Toolchain for Linux on System z and Cell BE
ulrich.weig...@de.ibm.com
Hi Richard,
2011/8/4 Richard Sandiford
>
> Hi Ayal,
>
> Thanks to you and Revital for the replies. The reason I asked is that
> I wanted to rewrite gen_sched_window so that it has only one loop over
> the PSPs and one loop over the PSSs.
This rewrite makes perfect sense regardless of any follo
> The only target supporting named address spaces today is spu-elf,
m32c-elf does too.
Georg-Johann Lay wrote:
> For the following 1-liner I get an error with current trunk r177267:
>
> const __pgm char * pallo = "pallo";
>
> __pgm as a named address space qualifier.
[snip]
> Moreover, if a user writes a line like
>const __pgm char * pallo = "pallo";
> he wants the string lite
On 08/04/2011 06:39 AM, Jan Hubicka wrote:
Also on the oriignal topic, Iknow that Mozlla folks experimented with this
switch (and I do expect it should make noticeable reducion in the hot section
footprint that is important for them). They are not using it at the moment
because of problems with t
On Thu, Aug 4, 2011 at 4:05 PM, Mike Hommey wrote:
> Hi,
>
> We (Mozilla) are trying to get the best of the ARM toolchain for our
> Android build. I recently built an Android Native-code Development Kit
> with GCC 4.6.1 and binutils 2.21.53, instead of GCC 4.4.3 and binutils
> 2.19 that come with
On 08/04/2011 12:19 PM, Richard Guenther wrote:
> On Thu, Aug 4, 2011 at 1:10 PM, Andrew Haley wrote:
>> On 08/04/2011 10:52 AM, Richard Guenther wrote:
>>> On Thu, Aug 4, 2011 at 11:50 AM, Andrew Haley wrote:
On 08/04/2011 01:19 AM, Hans-Peter Nilsson wrote:
> To make sure, it'd be
Hi,
We (Mozilla) are trying to get the best of the ARM toolchain for our
Android build. I recently built an Android Native-code Development Kit
with GCC 4.6.1 and binutils 2.21.53, instead of GCC 4.4.3 and binutils
2.19 that come with the default NDK.
LTO doesn't work at all, I'm getting an ICE t
Trying to make named address space support work for target AVR,
I am facing the following problem:
For generic AS, there are three valid base pointer registers
X , Y and Z.
For the new __pgm AS, only Z is available without offset.
The problem is now that addresses.h:base_reg_class() does not
pas
Also on the oriignal topic, Iknow that Mozlla folks experimented with this
switch (and I do expect it should make noticeable reducion in the hot section
footprint that is important for them). They are not using it at the moment
because of problems with their bug reporting tool not being able to do
> On Wed, Aug 3, 2011 at 2:06 PM, Jan Hubicka wrote:
> >> In xalancbmk, with the partition option, most of object files have
> >> nonzero size cold sections generated. The text size of the binary is
> >> increased to 3572728 bytes from 3466790 bytes. Profiling the program
> >> using the training
On Thu, 4 Aug 2011, Andreas Schwab wrote:
> Hans-Peter Nilsson writes:
>
> > To make sure, it'd be nice if someone could perhaps grep an
> > entire GNU/Linux-or-other distribution including the kernel for
> > uses of asm-declared *local* registers that don't directly feed
> > into asms and not bei
On 4 August 2011 11:31, LIM Fung-Chai wrote:
> Hi,
>
> On Thu, Aug 4, 2011 at 5:29 PM, Miles Bader wrote:
>> Jonathan Wakely writes:
"g++ -Wall -Wextra ..." should flag a warning on the following code
but does not.
>>>
>>> Thanks for the apology, but it should still be reported to bugzi
On Thu, Aug 4, 2011 at 1:10 PM, Andrew Haley wrote:
> On 08/04/2011 10:52 AM, Richard Guenther wrote:
>> On Thu, Aug 4, 2011 at 11:50 AM, Andrew Haley wrote:
>>> On 08/04/2011 01:19 AM, Hans-Peter Nilsson wrote:
>>>
To make sure, it'd be nice if someone could perhaps grep an
entire GNU/
On 08/04/2011 10:52 AM, Richard Guenther wrote:
> On Thu, Aug 4, 2011 at 11:50 AM, Andrew Haley wrote:
>> On 08/04/2011 01:19 AM, Hans-Peter Nilsson wrote:
>>
>>> To make sure, it'd be nice if someone could perhaps grep an
>>> entire GNU/Linux-or-other distribution including the kernel for
>>> use
Jonathan Wakely writes:
> No, returning a reference to a local variable is always wrong, not
> only because Meyers says so.
True ... :}
-miles
--
Apologize, v. To lay the foundation for a future offense.
Hi,
On Thu, Aug 4, 2011 at 5:29 PM, Miles Bader wrote:
> Jonathan Wakely writes:
>>> "g++ -Wall -Wextra ..." should flag a warning on the following code
>>> but does not.
>>
>> Thanks for the apology, but it should still be reported to bugzilla
>> not to this list.
I was hoping someone could su
On 4 August 2011 10:29, Miles Bader wrote:
> Jonathan Wakely writes:
>>> "g++ -Wall -Wextra ..." should flag a warning on the following code
>>> but does not.
>>
>> Thanks for the apology, but it should still be reported to bugzilla
>> not to this list.
>
> BTW, it should only warn if given -Weffc
On Thu, Aug 4, 2011 at 11:50 AM, Andrew Haley wrote:
> On 08/04/2011 01:19 AM, Hans-Peter Nilsson wrote:
>
>> To make sure, it'd be nice if someone could perhaps grep an
>> entire GNU/Linux-or-other distribution including the kernel for
>> uses of asm-declared *local* registers that don't directly
On 08/04/2011 01:19 AM, Hans-Peter Nilsson wrote:
> To make sure, it'd be nice if someone could perhaps grep an
> entire GNU/Linux-or-other distribution including the kernel for
> uses of asm-declared *local* registers that don't directly feed
> into asms and not being the stack-pointer? Or can w
For the following 1-liner I get an error with current trunk r177267:
const __pgm char * pallo = "pallo";
__pgm as a named address space qualifier.
>$TV/xgcc -B$TV pgm.c -c -save-temps -dp -mmcu=atmega8
unit size
align 8 symtab 0 alias set -1 canonical type 0xb74c7f00
Jonathan Wakely writes:
>> "g++ -Wall -Wextra ..." should flag a warning on the following code
>> but does not.
>
> Thanks for the apology, but it should still be reported to bugzilla
> not to this list.
BTW, it should only warn if given -Weffc++, right?
-Miles
--
People who are more than casu
On 4 August 2011 03:30, LIM Fung-Chai wrote:
> Hi,
>
> "g++ -Wall -Wextra ..." should flag a warning on the following code
> but does not.
>
> std::pair
> get_XYZ_data()
> {
> XYZ result;
> return std::pair(1, result);
> }
>
> This is a violation of Scott Meyer's "Effective C++" Item 21 "Don
Hi Ayal,
Thanks to you and Revital for the replies. The reason I asked is that
I wanted to rewrite gen_sched_window so that it has only one loop over
the PSPs and one loop over the PSSs. I have a follow-up patch to use
iv analysis to reduce the number of memory dependencies (or at least
increase
Hans-Peter Nilsson writes:
> To make sure, it'd be nice if someone could perhaps grep an
> entire GNU/Linux-or-other distribution including the kernel for
> uses of asm-declared *local* registers that don't directly feed
> into asms and not being the stack-pointer?
One frequent candidate is the
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