polina <[EMAIL PROTECTED]> writes:
> I would like to use the asm feature of the gcc compiler. I am not sure what
> backends the asm supports. Would it support any backend for which it was
> compiled? The reason I asked is because I cross-compiled gcc for the PISA
> architecture and I haven't been
Hi!
I would like to use the asm feature of the gcc compiler. I am not sure what
backends the asm supports. Would it support any backend for which it was
compiled? The reason I asked is because I cross-compiled gcc for the PISA
architecture and I haven't been able to find any information on using
Andi Kleen <[EMAIL PROTECTED]> writes:
> My gcc doesn't agree with you (I actually checked before posting)
Your test is flawed.
$ cat align.c
#include
#include
struct x {
unsigned char a[1];
double b;
};
int
main (void)
{
printf ("%d\n", offsetof (struct x, b));
}
$ ./align
4
(long lo
> Actually no. In 32-bit mode, double is aligned on a 4 byte boundary, not an 8
> byte boundary, unless you use -malign-double, which breaks the ABI. This has
> been a 'feature' of the original AT&T 386 System V ABI that Linux uses for
> 32-bit x86 processors. With the SCO mess, it may be hard t
Snapshot gcc-4.1-20071015 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.1-20071015/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.1 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches
Hi!
I am trying to define new ISA intructions for gcc 2.7.2. From what I fouind
out using gcc intrinsics is the best way to go about this. However I am
having trouble finding information on the intrinsics. And I am not
particulary sure that 2.7.2 supports intrinsics anyway. I would appreciate
any
On Mon, Oct 15, 2007 at 08:00:53PM +0200, Andi Kleen wrote:
> "Richard Guenther" <[EMAIL PROTECTED]> writes:
> >
> > The idea is not exactly new, the main complication is that it would need
> > hacking both the gcc (and glibc) side and the kernel syscall interface. The
> > 32bit compatibility entr
"Richard Guenther" <[EMAIL PROTECTED]> writes:
>
> The idea is not exactly new, the main complication is that it would need
> hacking both the gcc (and glibc) side and the kernel syscall interface. The
> 32bit compatibility entries cannot be used if you want to align long long and
> double natural
Richard Guenther wrote:
The idea is not exactly new, the main complication is that it would need
hacking both the gcc (and glibc) side and the kernel syscall interface. The
32bit compatibility entries cannot be used if you want to align long long and
double naturally (which you certainly want,
On 10/15/07, Denys Vlasenko <[EMAIL PROTECTED]> wrote:
> On Monday 15 October 2007 13:18, Darryl Miles wrote:
> > Yes maybe there is a restriction in the ELF format on the maximum
> > executable size but linking has little to do with the issue of improving
> > performance via better linkage ABI rul
On Monday 15 October 2007 13:18, Darryl Miles wrote:
> Yes maybe there is a restriction in the ELF format on the maximum
> executable size but linking has little to do with the issue of improving
> performance via better linkage ABI rules. Passing function arguments by
> registers [64bit] verse
On 10/15/07, Darryl Miles <[EMAIL PROTECTED]> wrote:
> Andrew Haley wrote:
> > Darryl Miles writes:
> > > Andrew Haley wrote:
> > > I'm not aware of a small memory model until now, let alone that I maybe
> > > actually using it already and that its already what I'm making an
> > > inquiry about
Windows XP/SP2 cygwin on pentium4 single i686:
binutils 20060817-1
bison2.3-1
cygwin 1.5.24-2 (with Dave Korn's stdio patch for newlib)
dejagnu 20021217-2
expect 20030128-1
gcc 3.4.4-3
gcc-ada 3.4.
Andrew Haley wrote:
Darryl Miles writes:
> Andrew Haley wrote:
> I'm not aware of a small memory model until now, let alone that I maybe
> actually using it already and that its already what I'm making an
> inquiry about.
Reading the gcc documentation would help you here. Section 3.17.13
Andrew Haley <[EMAIL PROTECTED]> writes:
>
> Reading the gcc documentation would help you here. Section 3.17.13,
> Intel 386 and AMD x86-64 Options.
>
> > > This is amazing! There is no way that going from the ia32 to
> > > (presumably) the x86_64 small model should more than double
> > > memo
Darryl Miles writes:
> Andrew Haley wrote:
> > This doesn't sound very different from the small memory model. With
> > the small model, the program and its symbols must be linked in the
> > lower 2 GB of the address space, but pointers are still 64 bits. This
> > is the default model for gcc
Andrew Haley wrote:
This doesn't sound very different from the small memory model. With
the small model, the program and its symbols must be linked in the
lower 2 GB of the address space, but pointers are still 64 bits. This
is the default model for gcc on GNU/Linux. It would be possible in
th
Darryl L. Miles writes:
>
> On SPARC there is an ABI that is V8+ which allows the linking (and
> mixing) of V8 ABI but makes uses of features of 64bit UltraSparc
> CPUs (that were not available in the older 32bit only CPUs).
> Admittedly looking at the way this works it could be said that Sun
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