;
> Signed-off-by: Thomas Zimmermann
> ---
...
> drivers/gpu/drm/meson/meson_drv.c | 2 +-
Acked-by: Neil Armstrong
...
>
> diff --git a/drivers/gpu/drm/meson/meson_drv.c
> b/drivers/gpu/drm/meson/meson_drv.c
> index a7388bf7c838..3d0ccc7eef1b
S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#ifndef __DRM_PROBE_HELPER_H__
> +#de
drivers/gpu/drm/mediatek/mtk_dpi.c| 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.c| 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_fb.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_dsi.c| 2 +-
> d
->ddc);
> + return PTR_ERR(vga->connector.ddc);
> }
> }
>
> @@ -216,8 +215,8 @@ static int dumb_vga_remove(struct platform_device *pdev)
>
> drm_bridge_remove(&vga->bridge);
>
> - if (!IS_ERR(vga->ddc))
> - i2c_put_adapter(vga->ddc);
> + if (!IS_ERR(vga->connector.ddc))
> + i2c_put_adapter(vga->connector.ddc);
>
> return 0;
> }
>
Reviewed-by: Neil Armstrong
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>adap);
> - hdmi->ddc = NULL;
> + hdmi->connector.ddc = NULL;
> }
>
> if (hdmi->cec_notifier)
> @@ -2788,7 +2788,7 @@ __dw_hdmi_probe(struct platform_device *pdev,
> err_isfr:
> clk_disable_unprepare(hdmi->isfr_clk);
> e
return ret;
> @@ -382,8 +381,8 @@ static int tfp410_fini(struct device *dev)
>
> drm_bridge_remove(&dvi->bridge);
>
> - if (dvi->ddc)
> - i2c_put_adapter(dvi->ddc);
> + if (dvi->connector.ddc)
> + i2c_put_adapter(dvi->connector.ddc);
> if (dvi->hpd)
> gpiod_put(dvi->hpd);
>
>
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> if (ret) {
> DRM_ERROR("Failed to initialize connector\n");
> return ret;
>
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ctor_type);
> + ret = drm_connector_init_with_ddc(bridge->dev, &dvi->connector,
> + &tfp410_con_funcs,
> + dvi->connector_type,
> + dvi->ddc);
> if (ret) {
>
Hi,
On 30/07/2019 19:30, Sam Ravnborg wrote:
> Hi Neil.
>
>>> Signed-off-by: Andrzej Pietrasiewicz
>>> ---
>>> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 40 +++
>>> 1 file changed, 20 insertions(+), 20 deletions(-)
>>>
Hi Sam,
On 26/07/2019 20:55, Sam Ravnborg wrote:
> Hi all.
>
> Andrzej have done a good job following up on feedback and this series is
> now ready.
>
> We need ack on the patches touching the individual drivers before we can
> proceed.
> Please check your drivers and get back.
I can apply all
On 31/07/2019 15:10, Andrzej Pietrasiewicz wrote:
> W dniu 31.07.2019 o 12:40, Sam Ravnborg pisze:
>> Hi Neil.
>>
>> On Wed, Jul 31, 2019 at 10:00:14AM +0200, Neil Armstrong wrote:
>>> Hi Sam,
>>>
>>> On 26/07/2019 20:55, Sam Ravnborg wrote:
>
Hi Andrzej,
On 31/07/2019 16:22, Neil Armstrong wrote:
> On 31/07/2019 15:10, Andrzej Pietrasiewicz wrote:
>> W dniu 31.07.2019 o 12:40, Sam Ravnborg pisze:
>>> Hi Neil.
>>>
>>> On Wed, Jul 31, 2019 at 10:00:14AM +0200, Neil Armstrong wrote:
>>>
Hi Andrzej,
I had to revert the previous patch, so you should re-spin it entirely :
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/gpu/drm/radeon/radeon_connectors.c: In function
'radeon_add_legacy_conne
Hi,
On 19/09/2019 05:30, jsa...@codeaurora.org wrote:
> Hello All,
>
> I bumped into the below check [1] enforced in drm_framebuffer creation which
> checks the requested framebuffer width/height parameters against the drm mode
> config width/height limits. As I understand, drm_mode_config: min
Hi Mihail,
On 04/12/2019 12:48, Mihail Atanassov wrote:
> Hi all,
>
> I've dropped the fun parts of this series since they need more work, but
> figured drm_bridge_init() as a concept is still valuable on its own (and
> I think I'll need it to roll out device links for registered bridges),
> so h
). I noticed that Neil landed my other patches to this driver
> recently (thanks!) and wondered why he didn't land this one. Then, I
> realized that you didn't send it to him or the other bridge
> maintainer. :( Have you tried running get_maintainer?
>
> $ ./scripts/get
cation for returned vblank timestamp.
> - * flags:
> - * 0 = Defaults, no special treatment needed.
> - * DRM_CALLED_FROM_VBLIRQ = Function is called from vblank
> - * irq handler. Some drivers need to apply some workarounds
> - * for gpu-specific vblank irq quirks if
_scanoutpos(struct drm_device *dev,
> unsigned int crtc_id,
> unsigned int flags, int *vpos, int *hpos,
> ktime_t *stime, ktime_t *etime,
> const struct drm_display_mode *mode);
> -bool vc4_crtc_get_vbla
---
> drivers/gpu/drm/vc4/vc4_crtc.c| 2 +-
> drivers/gpu/drm/vc4/vc4_drv.h | 2 +-
> include/drm/drmP.h| 1 -
> include/drm/drm_drv.h | 7 ++---
> include/drm/drm_irq.h
ve it to &struct drm_crtc_helper_funcs, like all the other
> * helper-internal hooks.
>*/
> - int (*get_scanout_position) (struct drm_device *dev, unsigned int pipe,
> - unsigned int flags, int *vpos, int *hpos,
> - ktime_t *stime, ktime_t *etime,
> - const struct drm_display_mode *mode);
> + bool (*get_scanout_position) (struct drm_device *dev, unsigned int pipe,
> + bool in_vblank_irq, int *vpos, int *hpos,
> + ktime_t *stime, ktime_t *etime,
> + const struct drm_display_mode *mode);
>
> /**
>* @get_vblank_timestamp:
>
Reviewed-by: Neil Armstrong
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> Cc: Liviu Dudau
> Cc: Brian Starkey
> Cc: Mali DP Maintainers
> Cc: Daniel Vetter
> Cc: Gustavo Padovan
> Cc: Sean Paul
> Cc: Philipp Zabel
> Cc: CK Hu
> Cc: Neil Armstrong
> Cc: Rob Clark
> Cc: Ben Skeggs
> Cc: Laurent Pinchart
> Cc: Sandy Huang
&
isplay/msm/qcom,sm8550-mdss.yaml
And same for SM8350 and SM8450.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (3):
dt-bindings: display: msm: sm8350-mdss: document displayport controller
subnode
dt-bindings: di
Document the optional document displayport controller subnode
of the SM8350 MDSS.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 6 ++
1 file changed, 6 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom
Document the optional document displayport controller subnode
of the SM8450 MDSS.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 8
1 file changed, 8 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom
Document the optional document displayport controller subnode
of the SM8550 MDSS.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 8
1 file changed, 8 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom
On 23/06/2023 09:27, Marijn Suijten wrote:
On 2023-06-21 11:26:25, Neil Armstrong wrote:
Document the optional document displayport controller subnode
document the optional *document*? Same in the other patches IIRC.
oops, will re-spin with this fixed
thanks!
- Marijn
of the SM8350
Document the optional displayport controller subnode of the SM8350 MDSS.
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 6 ++
1 file changed, 6 insertions(+)
diff --git
a/Documentation/devicetree/bindings
Document the optional displayport controller subnode of the SM8450 MDSS.
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 8
1 file changed, 8 insertions(+)
diff --git
a/Documentation/devicetree/bindings
isplay/msm/qcom,sm8550-mdss.yaml
And same for SM8350 and SM8450.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Removed duplicate "document" in commit messages
- Added review trailers
- Link to v1:
https://lore.kernel.
Document the optional displayport controller subnode of the SM8550 MDSS.
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 8
1 file changed, 8 insertions(+)
diff --git
a/Documentation/devicetree/bindings
r-pmu.yaml | 4 ++--
.../bindings/phy/mediatek,dsi-phy.yaml | 2 +-
.../remoteproc/amlogic,meson-mx-ao-arc.yaml| 2 +-
For amlogic ones:
Acked-by: Neil Armstrong
.../devicetree/bindings/usb/mediatek,mtu3.yaml | 2 +-
.../devicetree/bindings/usb/ti,am62-usb.yaml | 2 +-
orks fine with DMA2 & DMA3 planes with same parameters.
Tested with
https://patchwork.freedesktop.org/patch/538277/?series=118074&rev=1, and it
doesn't change anything.
I think this is still accurate:
Tested-by: Neil Armstrong # on SM8550-QRD
Thanks,
Neil
On 05/07/2023 14:04, Maxime Ripard wrote:
Hi,
On Tue, May 30, 2023 at 03:36:04PM +0300, Dmitry Baryshkov wrote:
On 30/05/2023 15:15, AngeloGioacchino Del Regno wrote:
Il 30/05/23 13:44, Dmitry Baryshkov ha scritto:
On Tue, 30 May 2023 at 10:24, Neil Armstrong
wrote:
Hi Marijn, Dmitry
On 05/07/2023 16:24, Maxime Ripard wrote:
On Wed, Jul 05, 2023 at 04:37:57PM +0300, Dmitry Baryshkov wrote:
Either way, I'm not really sure it's a good idea to multiply the
capabilities flags of the DSI host, and we should just stick to the
spec. If the spec says that we have to support DSC whi
On 06/07/2023 09:24, Maxime Ripard wrote:
On Wed, Jul 05, 2023 at 11:09:40PM +0300, Dmitry Baryshkov wrote:
On 05/07/2023 19:53, Maxime Ripard wrote:
On Wed, Jul 05, 2023 at 06:20:13PM +0300, Dmitry Baryshkov wrote:
On Wed, 5 Jul 2023 at 17:24, Maxime Ripard wrote:
On Wed, Jul 05, 2023 at 0
On 06/07/2023 09:59, Maxime Ripard wrote:
On Thu, Jul 06, 2023 at 09:33:15AM +0200, Neil Armstrong wrote:
On 06/07/2023 09:24, Maxime Ripard wrote:
On Wed, Jul 05, 2023 at 11:09:40PM +0300, Dmitry Baryshkov wrote:
On 05/07/2023 19:53, Maxime Ripard wrote:
On Wed, Jul 05, 2023 at 06:20:13PM
Hi,
On 06/07/2023 11:20, Amit Pundir wrote:
On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
wrote:
[Adding freedreno@ to cc list]
On Wed, 5 Jul 2023 at 08:31, Jagan Teki wrote:
Hi Amit,
On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir wrote:
Hi Marek,
On Wed, 5 Jul 2023 at 01:48, Marek Vasu
On 07/07/2023 09:18, Neil Armstrong wrote:
Hi,
On 06/07/2023 11:20, Amit Pundir wrote:
On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
wrote:
[Adding freedreno@ to cc list]
On Wed, 5 Jul 2023 at 08:31, Jagan Teki wrote:
Hi Amit,
On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir wrote:
Hi
Hi,
On 28/07/2023 03:26, Paloma Arellano wrote:
Enable display compression (DSC v1.2) and CMD mode for 1080x2400 Visionox
VTDR6130 AMOLED DSI panel. In addition, this patch will set the default
to command mode with DSC enabled.
Note: This patch has only been validated DSC over command mode as D
On 28/07/2023 23:44, Jessica Zhang wrote:
On 7/28/2023 2:37 AM, Dmitry Baryshkov wrote:
On Fri, 28 Jul 2023 at 04:26, Paloma Arellano wrote:
Enable display compression (DSC v1.2) and CMD mode for 1080x2400 Visionox
VTDR6130 AMOLED DSI panel. In addition, this patch will set the default
to c
On 01/08/2023 22:46, Dmitry Baryshkov wrote:
On 01/08/2023 23:43, Paloma Arellano wrote:
On 8/1/2023 1:26 AM, neil.armstr...@linaro.org wrote:
On 28/07/2023 23:44, Jessica Zhang wrote:
On 7/28/2023 2:37 AM, Dmitry Baryshkov wrote:
On Fri, 28 Jul 2023 at 04:26, Paloma Arellano wrote:
Ena
Hi Dmitry,
On 02/08/2023 03:18, Dmitry Baryshkov wrote:
Define a helper for creating simple transparent bridges which serve the
only purpose of linking devices into the bridge chain up to the last
bridge representing the connector. This is especially useful for
DP/USB-C bridge chains, which can
On 02/08/2023 10:08, Neil Armstrong wrote:
Hi Dmitry,
On 02/08/2023 03:18, Dmitry Baryshkov wrote:
Define a helper for creating simple transparent bridges which serve the
only purpose of linking devices into the bridge chain up to the last
bridge representing the connector. This is especially
Hi,
On 02/08/2023 03:18, Dmitry Baryshkov wrote:
Define a helper for creating simple transparent bridges which serve the
only purpose of linking devices into the bridge chain up to the last
bridge representing the connector. This is especially useful for
DP/USB-C bridge chains, which can span ac
Hi Marek,
On 13/07/2023 20:28, Marek Vasut wrote:
MIPI_DSI_MODE_VIDEO_NO_HFP means the HBP period is just skipped by DSIM.
Maybe there is a need for new set of flags which differentiate between HBP
skipped (i.e. NO HBP) and HBP LP11 ?
No, the section of the MIPI DSI spec I posted below
Hi Marek,
On 02/08/2023 14:25, Marek Vasut wrote:
On 8/2/23 10:39, neil.armstr...@linaro.org wrote:
Hi Marek,
Hi,
On 13/07/2023 20:28, Marek Vasut wrote:
MIPI_DSI_MODE_VIDEO_NO_HFP means the HBP period is just skipped by DSIM.
Maybe there is a need for new set of flags which different
**
* PERF data config
*/
Thanks !
Tested-by: Neil Armstrong # on SM8550-QRD
ns(+), 124 deletions(-)
---
base-commit: 6f9b660e9cbb30669fcfec83288d527c0844717d
change-id: 20230628-topic-a7xx_drmmsm-123f30d76cf7
Best regards,
Tested-by: Neil Armstrong # on SM8550-QRD
above first.
Proposed merge strategy: immutable branch with the drm commit, which is
then merged into PHY and USB subsystems together with the corresponding
patch.
Changes since v3:
- Moved bridge driver to gpu/drm/bridge (Neil Armstrong)
- Renamed it to aux-bridge (since there is already
M:Neil Armstrong
+R: Jessica Zhang
R:Sam Ravnborg
L:dri-de...@lists.freedesktop.org
S:Maintained
You're welcome !
Acked-by: Neil Armstrong
Thanks,
Neil
Hi,
On Thu, 31 Aug 2023 15:57:36 -0700, Jessica Zhang wrote:
> As I participate more actively in the drm/panel subsystem, I would
> like to get notified about new changes in this area.
>
> Since I have contributed and continue to contribute to drm/panel,
> add myself as a reviewer for the DRM pan
On 12/09/2023 19:39, Dmitry Baryshkov wrote:
On 12/09/2023 14:05, Heikki Krogerus wrote:
On Tue, Sep 12, 2023 at 12:15:10AM +0300, Dmitry Baryshkov wrote:
On 06/09/2023 16:38, Heikki Krogerus wrote:
On Wed, Sep 06, 2023 at 03:48:35PM +0300, Dmitry Baryshkov wrote:
On Wed, 6 Sept 2023 at 15:44
On 14/09/2023 11:26, Heikki Krogerus wrote:
Hi Dmitry,
On Wed, Sep 13, 2023 at 04:47:12PM +0300, Dmitry Baryshkov wrote:
On Wed, 13 Sept 2023 at 16:15, Heikki Krogerus
wrote:
On Wed, Sep 13, 2023 at 01:26:14PM +0300, Dmitry Baryshkov wrote:
Hi Heikki,
On Wed, 13 Sept 2023 at 12:27, Heikki
gister(struct drm_device *dev, unsigned long
flags)
goto out_unlock;
+err_unload:
+ if (dev->driver->unload)
+ dev->driver->unload(dev);
err_minors:
remove_compat_control_link(dev);
drm_minor_unregister(dev, DRM_MINOR_ACCEL);
Looks san
er {
const struct drm_encoder_funcs *funcs;
const struct drm_encoder_helper_funcs *helper_private;
+
+ /**
+* @debugfs_entry:
+*
+* Debugfs directory for this CRTC.
+*/
+ struct dentry *debugfs_entry;
};
#define obj_to_encoder(x) container_of(x, stru
e/drm/drm_bridge.h b/include/drm/drm_bridge.h
index c339fc85fd07..902bc3f99c2a 100644
--- a/include/drm/drm_bridge.h
+++ b/include/drm/drm_bridge.h
@@ -950,6 +950,4 @@ static inline struct drm_bridge *drmm_of_get_bridge(struct
drm_device *drm,
}
#endif
-void drm_bridge_debugfs_init(struct drm_minor *minor);
-
#endif
It would be nice to have a review from Tomi since he pushed the bridge chains
debugfs.
Apart that it looks fine:
Reviewed-by: Neil Armstrong
Thanks,
Neil
Hi Paloma,
On 28/07/2023 03:26, Paloma Arellano wrote:
Enable display compression (DSC v1.2) and CMD mode for 1080x2400 Visionox
VTDR6130 AMOLED DSI panel. In addition, this patch will set the default
to command mode with DSC enabled.
Note: This patch has only been validated DSC over command mo
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them from the vbif QoS
and OT limit setup functions.
Signed-off-by: Neil Armstrong
---
Neil
Add an helper to setup the force clock control as it will
be used in multiple HW files.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 23 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 21 +
drivers/gpu/drm/msm/disp
Move the actual call to the MDP setup_clk_force_ctrl() op to
an helper which will call the correct op depending on the caps.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers
Now clk_ctrl IDs can be optional and the clk_ctrl_reg can be specified
on the SSPP & WB caps directly, pass the SSPP & WB hw struct to the
qos & limit params then call the clk_force_ctrl() op accordingly.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_
The SM8550 has the SSPP clk_ctrl in the SSPP registers, move them
out of the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 35 ++
1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
An optional clk_ctrl struct is added to the SSPP & WB caps,
which can be used by the setup_clk_force_ctrl() op.
Signed-off-by: Neil Arms
On 09/10/2023 19:07, Dmitry Baryshkov wrote:
On 09/10/2023 19:36, Neil Armstrong wrote:
Now clk_ctrl IDs can be optional and the clk_ctrl_reg can be specified
on the SSPP & WB caps directly, pass the SSPP & WB hw struct to the
qos & limit params then call the clk_force_ctrl() op
On 09/10/2023 19:10, Dmitry Baryshkov wrote:
On 09/10/2023 19:36, Neil Armstrong wrote:
The SM8550 has the SSPP clk_ctrl in the SSPP registers, move them
out of the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 35 ++
1
On 09/10/2023 19:10, Dmitry Baryshkov wrote:
On 09/10/2023 19:36, Neil Armstrong wrote:
The SM8550 has the SSPP clk_ctrl in the SSPP registers, move them
out of the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 35 ++
1
On 10/10/2023 10:10, Marijn Suijten wrote:
On 2023-10-09 18:36:11, Neil Armstrong wrote:
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them from
alt_port->bridge.type = DRM_MODE_CONNECTOR_USB;
+ alt_port->bridge.type = DRM_MODE_CONNECTOR_DisplayPort;
ret = devm_drm_bridge_add(dev, &alt_port->bridge);
if (ret) {
Reviewed-by: Neil Armstrong
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them before/after calling the
QoS and OT limit setup functions.
Signed-off-by: Neil Armstrong
---
C
Add an helper to setup the force clock control as it will
be used in multiple HW files.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 23 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 21
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
Implement setup_clk_force_ctrl() only starting from major version 9
which corresponds to SM8550 MDSS.
Signed-off-by: Neil Armstrong
---
The SM8550 has the SSPP clk_ctrl in the SSPP registers, remove the
duplicate clock controls from the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20
1 file changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
b
Now SSPP and WB can have setup_force_clk_ctrl() ops, it's simpler to call
them from the plane and wb code and call into the mdp ops if not present.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c| 37 +--
drivers/gpu/drm/msm/disp
On 11/10/2023 14:45, Dmitry Baryshkov wrote:
On Wed, 11 Oct 2023 at 14:59, Neil Armstrong wrote:
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
Implement setup_clk_force_ctrl() only
-a -s 40@103:1024x768 -o test.d -P 47@103:1024x768
Signed-off-by: Neil Armstrong
---
Changes in v3:
- Collected reviews
- Add static const to clk_ctrl struct in sspp/wb
- Link to v2:
https://lore.kernel.org/r/20231011-topic-sm8550-graphics-sspp-split-clk-v2-0-b219c945d...@linaro.org
Changes in v2:
Add an helper to setup the force clock control as it will
be used in multiple HW files.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 23 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 21
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
Implement setup_clk_force_ctrl() only starting from major version 9
which corresponds to SM8550 MDSS.
Reviewed-by: Dmitry Baryshkov
Now SSPP and WB can have setup_force_clk_ctrl() ops, it's simpler to call
them from the plane and wb code and call into the mdp ops if not present.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
Enable WB2 hardware block, enabling writeback support on this platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
The SM8550 has the SSPP clk_ctrl in the SSPP registers, remove the
duplicate clock controls from the MDP top.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20
1 file changed, 20 deletions(-)
diff
On 16/10/2023 18:53, Dmitry Baryshkov wrote:
The MIPI DSI links do not fully fall into the DRM callbacks model. The
drm_bridge_funcs abstraction. Instead of having just two states (off and
on) the DSI hosts have separate LP-11 state. In this state the host is
on, but the video stream is not yet e
le at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm85650/upstream/integ
Signed-off-by: Neil Armstrong
---
Neil Armstrong (8):
dt-bindings: display: msm-dsi-phy-7nm: document the SM8650 DSI PHY
dt-bindings: display: msm-dsi-controller-main: document the SM8650 DSI
Control
Document the DSI PHY on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
b/Documentation/devicetree/bindings
Document the DSI Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b
Document the DPU Display Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 127 +
1 file changed, 127 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
b
Document the Mobile Display Subsystem (MDSS) on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-mdss.yaml | 322 +
1 file changed, 322 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm8650
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
.../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h| 458 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 23 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1
Add Mobile Display Subsystem (MDSS) support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/msm_mdss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 6865db1e3ce8..33947a2e313c 100644
--- a
Add DSI PHY support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++
3 files changed, 30 insertions(+)
diff
Add DSI Controller version 2.8.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 17 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers
On 25/10/2023 09:49, Dmitry Baryshkov wrote:
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
Thanks for your patch. Could you please rebase it on top of
https://patchwork.freedesktop.org/series/119804
On 25/10/2023 10:03, Dmitry Baryshkov wrote:
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
Add DSI PHY support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers
le at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Rebased on top of https://patchwork.freedesktop.org/series/119804/
- Enabled SDMA
- Fixed sm8650_rt_pri_lvl table
- Collected Reviewed-by tags
- Link t
Document the DSI PHY on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
b
Document the DSI Controller on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi
Document the DPU Display Controller on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 127 +
1 file changed, 127 insertions(+)
diff --git a/Documentation/devicetree/bindings
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
.../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h| 457 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 26 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1
Add DSI PHY support for the SM8650 platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++
3 files
Add DSI Controller version 2.8.0 support for the SM8650 platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 17 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm
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