On 17-02-21, 09:36, Stephen Boyd wrote:
> Quoting Kuogee Hsieh (2021-02-17 08:58:42)
> > Add hbr3_hbr2 voltage and pre-emphasis swing table to support
> > HBR3 link rate
> >
> > Signed-off-by: Kuogee Hsieh
> > ---
> > drivers/gpu/drm/msm/dp/dp_panel.c | 4
> > drivers/phy/qualcomm/phy-qc
part of this series) and DT changes can be found at:
git.linaro.org/people/vinod.koul/kernel.git pixel/dsc_rfc
Comments welcome!
Vinod Koul (13):
drm/dsc: Add dsc pps header init function
dt-bindings: msm/dsi: Document Display Stream Compression (DSC)
parameters
drm/msm/dsi: add support for
We required a helper to create and set the dsc_dce_header, so add the
dsc_dce_header and API drm_dsc_dsi_pps_header_init
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/drm_dsc.c | 11 +++
include/drm/drm_dsc.h | 16
2 files changed, 27 insertions(+)
diff --git a
-off-by: Vinod Koul
---
.../devicetree/bindings/display/msm/dsi.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt
b/Documentation/devicetree/bindings/display/msm/dsi.txt
index b9a64d3ff184..83d2fb92267e 100644
--- a
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 26 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
DSC needs some configuration from device tree, add support to read and
store these params and add DSC structures in msm_drv
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 170 +
drivers/gpu/drm/msm/msm_drv.h | 32 ++
2 files changed, 202
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14
2 files changed, 46 insertions
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 26 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14
2 files changed, 46 insertions
DSC needs some configuration from device tree, add support to read and
store these params and add DSC structures in msm_drv
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 171 +
drivers/gpu/drm/msm/msm_drv.h | 32 ++
2 files changed, 203
This add the bits in RM to enable the DSC blocks
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 32 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files changed, 34 insertions(+)
diff --git a
This add SDM845 DSC blocks into hw_catalog
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
drivers/gpu
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
drivers/gpu
When DSC is enabled in DT, we need to configure the encoder for DSC
configuration, calculate DSC parameters for the given timing.
This patch adds that support by adding dpu_encoder_prep_dsc() which is
invoked when DSC is enabled in DT
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1
s
use 2 encoders.
So for now we blindly create 2,2,1 topology when DSC is enabled
Co-developed-by: Abhinav Kumar
Signed-off-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gp
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +
include/drm/drm_panel.h| 7 +++
2 files changed, 12
On 21-05-21, 08:18, Rob Herring wrote:
> On Fri, May 21, 2021 at 7:50 AM Vinod Koul wrote:
> >
> > DSC enables streams to be compressed before we send to panel. This
> > requires DSC enabled encoder and a panel to be present. So we add this
> > information in board
On 21-05-21, 17:29, Daniel Vetter wrote:
> On Fri, May 21, 2021 at 06:19:30PM +0530, Vinod Koul wrote:
> > We required a helper to create and set the dsc_dce_header, so add the
> > dsc_dce_header and API drm_dsc_dsi_pps_header_init
> >
> > Signed-off-by: Vinod Koul
&
On 21-05-21, 09:42, Bjorn Andersson wrote:
> On Fri 21 May 07:49 CDT 2021, Vinod Koul wrote:
>
> > DSC enables streams to be compressed before we send to panel. This
> > requires DSC enabled encoder and a panel to be present. So we add this
> > information in board DT
On 24-05-21, 10:08, Bjorn Andersson wrote:
> On Mon 24 May 02:30 CDT 2021, Vinod Koul wrote:
>
> > On 21-05-21, 09:42, Bjorn Andersson wrote:
> > > On Fri 21 May 07:49 CDT 2021, Vinod Koul wrote:
> > >
> > > > DSC enables streams to be compressed befo
Hello Jeff,
On 21-05-21, 08:09, Jeffrey Hugo wrote:
> On Fri, May 21, 2021 at 6:50 AM Vinod Koul wrote:
> >
> > Display Stream Compression (DSC) compresses the display stream in host which
> > is later decoded by panel. This series enables this for Qualcomm msm driver.
&
On 26-05-21, 09:00, Jeffrey Hugo wrote:
> On Tue, May 25, 2021 at 11:46 PM Vinod Koul wrote:
> > On 21-05-21, 08:09, Jeffrey Hugo wrote:
> > > On Fri, May 21, 2021 at 6:50 AM Vinod Koul wrote:
> > > >
> > > > Display Stream Compression (DSC) compresses
On 27-05-21, 16:30, Rob Clark wrote:
> On Wed, May 26, 2021 at 8:00 AM Jeffrey Hugo wrote:
> > On Tue, May 25, 2021 at 11:46 PM Vinod Koul wrote:
> > Frankly, I don't like the MSM ACPI solution that I've seen on the laptops.
> > The ACPI assumes the entire MDSS (
On 28-05-21, 02:45, Dmitry Baryshkov wrote:
> On 21/05/2021 15:49, Vinod Koul wrote:
> > DSC needs some configuration from device tree, add support to read and
> > store these params and add DSC structures in msm_drv
> >
> > Signed-off-by: Vinod Koul
> >
On 28-05-21, 13:29, Dmitry Baryshkov wrote:
> On 21/05/2021 15:49, Vinod Koul wrote:
> > DSC needs some configuration from device tree, add support to read and
> > store these params and add DSC structures in msm_drv
> >
> > Signed-off-by: Vinod Koul
> >
On 03-06-21, 16:40, abhin...@codeaurora.org wrote:
> On 2021-06-02 04:01, Vinod Koul wrote:
> > On 27-05-21, 16:30, Rob Clark wrote:
> >
> > yeah that is always a very different world. although it might make sense
> > to use information in tables and try to deduce infor
comments raised by Dimitry
- Add dsc parameters calculation from downstream
Vinod Koul (11):
drm/msm/dsi: add support for dsc data
drm/msm/disp/dpu1: Add support for DSC
drm/msm/disp/dpu1: Add support for DSC in pingpong block
drm/msm/disp/dpu1: Add DSC support in RM
drm/msm/disp/dpu1: Add
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
Changes since RFC:
- Drop the DT parsing code
- Port dsc param
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
Changes since RFC:
- Drop unused enums
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14
2 files changed, 46 insertions
This add the bits in RM to enable the DSC blocks
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 32 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files changed, 34 insertions(+)
diff --git a
This add SDM845 DSC blocks into hw_catalog
Signed-off-by: Vinod Koul
---
Changes since RFC:
- use BIT values from MASK
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
drivers/gpu
When DSC is enabled in DT, we need to configure the encoder for DSC
configuration, calculate DSC parameters for the given timing.
This patch adds that support by adding dpu_encoder_prep_dsc() which is
invoked when DSC is enabled in DT
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1
ed-by: Abhinav Kumar
Signed-off-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
Changes since RFC:
- Add more details in changelog
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/dr
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 16 +++-
include/drm/drm_panel.h| 7 +++
2 files
Hi Abhinav,
On 02-08-21, 15:55, abhin...@codeaurora.org wrote:
> > +static int dsi_populate_dsc_params(struct msm_display_dsc_config *dsc)
> > +{
> > + int mux_words_size;
> > + int groups_per_line, groups_total;
> > + int min_rate_buffer_size;
> > + int hrd_delay;
> > + int pre_num_ext
On 02-08-21, 16:03, abhin...@codeaurora.org wrote:
> On 2021-07-14 23:51, Vinod Koul wrote:
> > Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
> > support by adding hw blocks for DSC
> >
> > Signed-off-by: Vinod Koul
> > ---
> >
On 29-07-21, 23:23, Dmitry Baryshkov wrote:
> On 15/07/2021 09:51, Vinod Koul wrote:
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> > index fd2d104f0a91..4da6d72b7996 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1
On 02-08-21, 16:24, abhin...@codeaurora.org wrote:
> On 2021-07-14 23:51, Vinod Koul wrote:
> > @@ -476,6 +498,9 @@ static int _dpu_rm_reserve_intf(
> > }
> >
> > global_state->intf_to_enc_id[idx] = enc_id;
> > +
> > + global_state->ds
On 29-07-21, 23:25, Dmitry Baryshkov wrote:
> On 15/07/2021 09:51, Vinod Koul wrote:
> > This add SDM845 DSC blocks into hw_catalog
> >
> > Signed-off-by: Vinod Koul
> > ---
> > Changes since RFC:
> > - use BIT values from MASK
> >
> >
On 02-08-21, 16:29, abhin...@codeaurora.org wrote:
> On 2021-07-14 23:51, Vinod Koul wrote:
> > This add SDM845 DSC blocks into hw_catalog
> /add --> adds
> >
> > Signed-off-by: Vinod Koul
> > ---
> > Changes since RFC:
> > - use BIT values
On 30-07-21, 01:15, Dmitry Baryshkov wrote:
> On 15/07/2021 09:51, Vinod Koul wrote:
> > Later gens of hardware have DSC bits moved to hw_ctl, so configure these
> > bits so that DSC would work there as well
> >
> > Signed-off-by: Vinod Koul
> > ---
&g
On 02-08-21, 17:00, abhin...@codeaurora.org wrote:
> On 2021-07-14 23:51, Vinod Koul wrote:
> > Later gens of hardware have DSC bits moved to hw_ctl, so configure these
> > bits so that DSC would work there as well
> >
> > Signed-off-by: Vinod Koul
> Please correct
On 02-08-21, 17:24, abhin...@codeaurora.org wrote:
> On 2021-07-14 23:51, Vinod Koul wrote:
> > We cannot enable mode_3d when we are using the DSC. So pass
> > configuration to detect DSC is enabled and not enable mode_3d
> > when we are using DSC
>
On 29-07-21, 23:54, Dmitry Baryshkov wrote:
> On 15/07/2021 09:52, Vinod Koul wrote:
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > index 8d942052db8a..41140b781e66 100644
> > --- a/drivers/gpu/drm/
On 02-08-21, 17:57, abhin...@codeaurora.org wrote:
> On 2021-07-14 23:52, Vinod Koul wrote:
> > When DSC is enabled in DT, we need to configure the encoder for DSC
> > configuration, calculate DSC parameters for the given timing.
> >
> > This patch adds that support by
mask, use 0
- Check for DSC in hw_ctl
Changes since RFC:
- Drop the DT binding patch as we derive the configuration from panel
- Drop the drm api patch as we no longer need it (use pps drm api)
- Fix comments raised by Dimitry
- Add dsc parameters calculation from downstream
Vinod Koul (11
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
Changes since
v1:
- Drop unused fields from msm_display_dsc_config
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
Changes since
v1:
- remove unused variable lp
- Update copyright year
RFC:
- Drop unused enums
drivers/gpu/drm/msm/Makefile | 1
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14
2
This add the bits in RM to enable the DSC blocks
Signed-off-by: Vinod Koul
---
Changes since
v1:
- Add _dpu_rm_reserve_dsc() function which checks if DSC is enabled
- Fix to use dsc_blks
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 61
This adds SDM845 DSC blocks into hw_catalog
Signed-off-by: Vinod Koul
---
Changes since
v1:
- Remove DSC_SDM845_MASK and use 0 as feature mask
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
Changes since
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Signed-off-by: Vinod Koul
---
Changes since
v1:
- Move this patch from 6 to 7 due to dependency on 6th one
- Use DSC indices for programming DSC registers and program only on non
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Signed-off-by: Vinod Koul
---
Changes since
v1:
- Remove duplicate defines
- Update
The panel has been tested only with 2,2,1 configuration, so for
now we blindly create 2,2,1 topology when DSC is enabled
Co-developed-by: Abhinav Kumar
Signed-off-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
Changes since
RFC:
- Add more details in changelog
drivers/gpu/drm/msm/disp
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 16 +++-
include/drm/drm_panel.h| 7 +++
2 files
On 14-10-21, 17:40, Dmitry Baryshkov wrote:
> On 07/10/2021 10:08, Vinod Koul wrote:
> > +static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
> > + struct msm_display_dsc_config *dsc, u32 mode)
> > +{
> > + struct dpu_hw_blk_reg_map *c
On 14-10-21, 17:11, Dmitry Baryshkov wrote:
> On 07/10/2021 10:08, Vinod Koul wrote:
> > +static int _dpu_rm_reserve_dsc(struct dpu_rm *rm,
> > + struct dpu_global_state *global_state,
> > + struct drm_encoder *enc)
On 19-10-21, 18:52, Dmitry Baryshkov wrote:
> On Tue, 19 Oct 2021 at 18:30, Vinod Koul wrote:
> >
> > On 14-10-21, 17:11, Dmitry Baryshkov wrote:
> > > On 07/10/2021 10:08, Vinod Koul wrote:
> >
> > > > +static int _dpu_rm_reserve_dsc(struct dpu_rm *rm,
On 14-10-21, 16:50, Dmitry Baryshkov wrote:
> On 14/10/2021 16:41, Dmitry Baryshkov wrote:
> > On 07/10/2021 10:08, Vinod Koul wrote:
> > > We cannot enable mode_3d when we are using the DSC. So pass
> > > configuration to detect DSC is enabled and not enable mode_3d
On 14-10-21, 17:06, Dmitry Baryshkov wrote:
> On 07/10/2021 10:08, Vinod Koul wrote:
> > Later gens of hardware have DSC bits moved to hw_ctl, so configure these
> > bits so that DSC would work there as well
> >
> > Signed-off-by: Vinod Koul
> > ---
> >
On 15-10-21, 02:18, Dmitry Baryshkov wrote:
> On 07/10/2021 10:08, Vinod Koul wrote:
> > When DSC is enabled, we need to configure DSI registers accordingly and
> > configure the respective stream compression registers.
> >
> > Add support to calculate the register sett
On 25-10-21, 17:40, Dmitry Baryshkov wrote:
> On 20/10/2021 09:57, Vinod Koul wrote:
> > On 14-10-21, 16:50, Dmitry Baryshkov wrote:
> > > On 14/10/2021 16:41, Dmitry Baryshkov wrote:
> > > > On 07/10/2021 10:08, Vinod Koul wrote:
> > > > > diff --git
On 25-10-21, 17:37, Dmitry Baryshkov wrote:
> On 14/10/2021 17:13, Dmitry Baryshkov wrote:
> > On 07/10/2021 10:08, Vinod Koul wrote:
> > > @@ -572,8 +574,22 @@ static struct msm_display_topology
> > > dpu_encoder_get_topology(
> > > topology.num_en
patch as we no longer need it (use pps drm api)
- Fix comments raised by Dimitry
- Add dsc parameters calculation from downstream
Vinod Koul (13):
drm/msm/dsi: add support for dsc data
drm/msm/disp/dpu1: Add support for DSC
drm/msm/disp/dpu1: Add support for DSC in pingpong block
drm/msm/disp
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 132
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1
This adds SDM845 DSC blocks into hw_catalog
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
drivers/gpu/drm
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 140
Somehow documentation for dspp was missed, so add that
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/msm_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index de7cb65bfc52..c4a588ad226e 100644
--- a/drivers/gpu/drm/msm
width.
The panel has been tested only with 2,2,1 configuration, so for
now we blindly create 2,2,1 topology when DSC is enabled
Co-developed-by: Abhinav Kumar
Signed-off-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 ++
drivers/gp
This add the bits in RM to enable the DSC blocks
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 66 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files changed, 68 insertions(+)
diff --git a
Add a mode valid callback for dsi_mgr for checking mode being valid in
case of DSC. For DSC the height and width needs to be multiple of slice,
so we check that here
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi.h | 2 ++
drivers/gpu/drm/msm/dsi/dsi_host.c| 26
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 16 +++-
include/drm/drm_panel.h| 7 +++
2 files
On 02-12-21, 14:51, Stephen Boyd wrote:
> Quoting Stephen Boyd (2021-09-14 12:49:13)
> > Quoting Kuogee Hsieh (2021-09-14 09:45:01)
> > > Both voltage and pre-emphasis swing level are set during link training
> > > negotiation between host and sink. There are totally four tables added.
> > > A volt
On 08-12-21, 13:22, Kuogee Hsieh wrote:
> From: Kuogee Hsieh
>
> "add support for sm8250-usb3-dp phy" patch added functions to support V4
^^
why this leading quote here?
> phy. But it did not update voltage and pre-emphasis tables accordingly.
> This patch add v4 voltage and pre-emphasis swing
Hi Kuogee,
On 13-12-21, 15:47, Kuogee Hsieh wrote:
> From: Kuogee Hsieh
The patch is sent by Kuogee Hsieh , the patch
author is Kuogee Hsieh and s-o-b Kuogee Hsieh
.
Sorry but they need to match before I can pick this.
(Hint: git commit --amend --reset-author would do so provided gitconfig
has
)
- Fix comments raised by Dimitry
- Add dsc parameters calculation from downstream
Vinod Koul (13):
drm/msm/dsi: add support for dsc data
drm/msm/dsi: Pass DSC params to drm_panel
drm/msm/disp/dpu1: Add support for DSC
drm/msm/disp/dpu1: Add support for DSC in pingpong block
drm/msm/disp
: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi.c | 5 +
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 22 ++
drivers/gpu/drm/msm/msm_drv.h
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 132
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13 ++
drivers/gpu/drm
)
- Fix comments raised by Dimitry
- Add dsc parameters calculation from downstream
Vinod Koul (13):
drm/msm/dsi: add support for dsc data
drm/msm/dsi: Pass DSC params to drm_panel
drm/msm/disp/dpu1: Add support for DSC
drm/msm/disp/dpu1: Add support for DSC in pingpong block
drm/msm/disp
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 132
: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi.c | 5 +
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 22 ++
drivers/gpu/drm/msm/msm_drv.h
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13 ++
drivers/gpu/drm
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1
This adds SDM845 DSC blocks into hw_catalog
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 ++
2
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