[PATCH 0/1] Expose UCHE_TRAP_BASE value via uapi

2024-12-03 Thread Danylo Piliaiev
] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29860 Danylo Piliaiev (1): drm/msm: Expose uche trap base via uapi drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 6 -- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 10 ++ drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12

[PATCH 1/1] drm/msm: Expose uche trap base via uapi

2024-12-03 Thread Danylo Piliaiev
This adds MSM_PARAM_UCHE_TRAP_BASE that will be used by Mesa implementation for VK_KHR_shader_clock and GL_ARB_shader_clock. Signed-off-by: Danylo Piliaiev --- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 6 -- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 10 ++ drivers/gpu/drm/msm

[PATCH v2 1/1] drm/msm: Expose uche trap base via uapi

2024-12-03 Thread Danylo Piliaiev
across the device level. On a4xx and a5xx it was not tested what is at UCHE_TRAP_BASE address, there uche trap base is exposed just for completeness. Signed-off-by: Danylo Piliaiev --- Changes in v2: - Rebased on top of https://patchwork.freedesktop.org/series/141667/ in order to return error

[PATCH v2 0/1] Expose UCHE_TRAP_BASE value via uapi

2024-12-03 Thread Danylo Piliaiev
on A7XX+. However, from testing, we could get correct shader clock on A6XX. The uche trap base value is not used by Mesa for A4XX and A5XX. [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29860 Danylo Piliaiev (1): drm/msm: Expose uche trap base via uapi drivers/gpu/drm/msm