Re: [PATCH v2 1/4] drm/dp: Add helper to set LTTPRs in transparent mode

2024-12-30 Thread Jani Nikula
On Mon, 30 Dec 2024, Dmitry Baryshkov wrote: > On Mon, Dec 30, 2024 at 03:18:35PM +0200, Jani Nikula wrote: >> On Thu, 26 Dec 2024, Abel Vesa wrote: >> > On 24-12-11 15:42:27, Johan Hovold wrote: >> >> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote: >> >> >> >> > +/** >> >> > + * drm

[PATCH v3 2/6] drm/msm: a6x: Rework qmp_get() error handling

2024-12-30 Thread Akhil P Oommen
Fix the following for qmp_get() errors: 1. Correctly handle probe defer for A6x GPUs 2. Ignore other errors because those are okay when GPU ACD is not required. They are checked again during gpu acd probe. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 5 +++-- 1 file

[PATCH v3 0/6] Support for GPU ACD feature on Adreno X1-85

2024-12-30 Thread Akhil P Oommen
This series adds support for ACD feature for Adreno GPU which helps to lower the power consumption on GX rail and also sometimes is a requirement to enable higher GPU frequencies. At high level, following are the sequences required for ACD feature: 1. Identify the ACD level data for each re

[PATCH v3 1/6] drm/msm/adreno: Add support for ACD

2024-12-30 Thread Akhil P Oommen
ACD a.k.a Adaptive Clock Distribution is a feature which helps to reduce the power consumption. In some chipsets, it is also a requirement to support higher GPU frequencies. This patch adds support for GPU ACD by sending necessary data to GMU and AOSS. The feature support for the chipset is detecte

[PATCH v3 3/6] drm/msm/adreno: Add module param to disable ACD

2024-12-30 Thread Akhil P Oommen
Add a module param to disable ACD which will help to quickly rule it out for any GPU issues. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 7 +++ drivers/gpu/drm/msm/adreno/adreno_device.c | 4 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/

[PATCH v3 4/6] dt-bindings: opp: Add v2-qcom-adreno vendor bindings

2024-12-30 Thread Akhil P Oommen
Add a new schema which extends opp-v2 to support a new vendor specific property required for Adreno GPUs found in Qualcomm's SoCs. The new property called "qcom,opp-acd-level" carries a u32 value recommended for each opp needs to be shared to GMU during runtime. Also, update MAINTAINERS file inclu

[PATCH v3 5/6] arm64: dts: qcom: x1e80100: Add ACD levels for GPU

2024-12-30 Thread Akhil P Oommen
Update GPU node to include acd level values. Signed-off-by: Akhil P Oommen --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 88805629ed2

[PATCH v3 6/6] arm64: dts: qcom: x1e80100: Add OPPs up to Turbo L3 for GPU

2024-12-30 Thread Akhil P Oommen
Now that we have ACD support for GPU, add additional OPPs up to Turbo L3 which are supported across all existing SKUs. Signed-off-by: Akhil P Oommen --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dt

Re: [PATCH v2 1/4] drm/dp: Add helper to set LTTPRs in transparent mode

2024-12-30 Thread Jani Nikula
On Thu, 26 Dec 2024, Abel Vesa wrote: > On 24-12-11 15:42:27, Johan Hovold wrote: >> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote: >> >> > +/** >> > + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in transparent mode >> > + * @aux: DisplayPort AUX channel >> > + * @enable: Ena

Re: [PATCH v2 2/3] dt-bindings: opp: Add v2-qcom-adreno vendor bindings

2024-12-30 Thread Konrad Dybcio
On 24.12.2024 9:51 AM, Krzysztof Kozlowski wrote: > On 23/12/2024 22:31, Akhil P Oommen wrote: >> On 12/23/2024 5:24 PM, Dmitry Baryshkov wrote: >>> On Mon, Dec 23, 2024 at 12:31:27PM +0100, Konrad Dybcio wrote: On 4.12.2024 7:18 PM, Akhil P Oommen wrote: > On 11/16/2024 1:17 AM, Dmitry Ba

Re: [PATCH v2 1/4] drm/dp: Add helper to set LTTPRs in transparent mode

2024-12-30 Thread Dmitry Baryshkov
On Mon, Dec 30, 2024 at 03:18:35PM +0200, Jani Nikula wrote: > On Thu, 26 Dec 2024, Abel Vesa wrote: > > On 24-12-11 15:42:27, Johan Hovold wrote: > >> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote: > >> > >> > +/** > >> > + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in tran

[PATCH v2] drm/msm: UAPI error reporting

2024-12-30 Thread Rob Clark
From: Rob Clark Debugging incorrect UAPI usage tends to be a bit painful, so add a helper macro to make it easier to add debug logging which can be enabled at runtime via drm.debug. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 21 drivers/gpu/drm/msm/msm_drv.

Re: [PATCH v3 4/6] dt-bindings: opp: Add v2-qcom-adreno vendor bindings

2024-12-30 Thread Rob Herring (Arm)
On Tue, 31 Dec 2024 02:41:05 +0530, Akhil P Oommen wrote: > Add a new schema which extends opp-v2 to support a new vendor specific > property required for Adreno GPUs found in Qualcomm's SoCs. The new > property called "qcom,opp-acd-level" carries a u32 value recommended > for each opp needs to b

Re: [PATCH v4 17/25] drm/msm/dpu: Fail atomic_check if CWB and CDM are enabled

2024-12-30 Thread Dmitry Baryshkov
On Thu, Dec 26, 2024 at 02:51:12PM -0800, Jessica Zhang wrote: > > > On 12/19/2024 9:44 PM, Dmitry Baryshkov wrote: > > On Mon, Dec 16, 2024 at 04:43:28PM -0800, Jessica Zhang wrote: > > > We cannot support both CWB and CDM simultaneously as this would require > > > 2 CDM blocks and currently our

Re: [PATCH v2 2/2] arm64: dts: qcom: sm8650: correct MDSS interconnects

2024-12-30 Thread Neil Armstrong
On 26/10/2024 19:59, Dmitry Baryshkov wrote: SM8650 lists two interconnects for the display subsystem, mdp0-mem (between MDP and LLCC) and mdp1-mem (between LLCC and EBI, memory). The second interconnect is a misuse. mdpN-mem paths should be used for several outboud MDP interconnects rather than