Re: [PATCH v2] drm/msm/dpu: don't always activate merge_3d block

2024-10-14 Thread Jessica Zhang
On 10/14/2024 12:13 AM, Dmitry Baryshkov wrote: On Sun, Oct 13, 2024 at 07:37:20PM -0700, Abhinav Kumar wrote: Hi Dmitry On 10/13/2024 5:20 PM, Dmitry Baryshkov wrote: On Fri, Oct 11, 2024 at 10:25:13AM -0700, Jessica Zhang wrote: Only enable the merge_3d block for the video phys encoder w

Re: [PATCH v2 1/2] drm/msm/dsi: improve/fix dsc pclk calculation

2024-10-14 Thread Abhinav Kumar
On 10/6/2024 10:01 PM, Jonathan Marek wrote: drm_mode_vrefresh() can introduce a large rounding error, avoid it. Fixes: 7c9e4a554d4a ("drm/msm/dsi: Reduce pclk rate for compression") Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- 1 file changed, 1 insertion(+

Re: [PATCH 1/3] drm/msm: Avoid NULL dereference in msm_disp_state_print_regs()

2024-10-14 Thread Abhinav Kumar
On 10/14/2024 9:36 AM, Douglas Anderson wrote: If the allocation in msm_disp_state_dump_regs() failed then `block->state` can be NULL. The msm_disp_state_print_regs() function _does_ have code to try to handle it with: if (*reg) dump_addr = *reg; ...but since "dump_addr" is initializ

Re: [PATCH v4 5/5] drm/msm/dp: Add DisplayPort controller for SA8775P

2024-10-14 Thread Soutrik Mukhopadhyay
On 10/7/2024 1:21 AM, Dmitry Baryshkov wrote: On Fri, Oct 04, 2024 at 04:00:46PM GMT, Soutrik Mukhopadhyay wrote: The Qualcomm SA8775P platform comes with 2 DisplayPort controllers for each mdss, having different base offsets than the previous SoCs. The support for all 4 DPTX have been added h

Re: [PATCH v2 2/2] drm/msm/dsi: fix 32-bit signed integer extension in pclk_rate calculation

2024-10-14 Thread Abhinav Kumar
On 10/6/2024 10:01 PM, Jonathan Marek wrote: When (mode->clock * 1000) is larger than (1<<31), int to unsigned long conversion will sign extend the int to 64 bits and the pclk_rate value will be incorrect. Fix this by making the result of the multiplication unsigned. Note that above (1<<32)

Re: [PATCH] drm/msm/hdmi: drop pll_cmp_to_fdata from hdmi_phy_8998

2024-10-14 Thread Abhinav Kumar
On 9/21/2024 2:14 PM, Dmitry Baryshkov wrote: The pll_cmp_to_fdata() was never used by the working code. Drop it to prevent warnings with W=1 and clang. Reported-by: Jani Nikula Closes: https://lore.kernel.org/dri-devel/3553b1db35665e6ff08592e35eb438a574d1ad65.1725962479.git.jani.nik...@int

Re: [PATCH] drm/msm/dpu: Don't always set merge_3d pending flush

2024-10-14 Thread Jessica Zhang
On 10/10/2024 8:20 AM, Dmitry Baryshkov wrote: On Wed, Oct 09, 2024 at 08:41:13PM GMT, Jessica Zhang wrote: Don't set the merge_3d pending flush bits if the mode_3d is BLEND_3D_NONE. Always flushing merge_3d can cause timeout issues when there are multiple commits with concurrent writeback e

Re: [PATCH RFC 2/3] dt-bindings: opp: Add v2-qcom-adreno vendor bindings

2024-10-14 Thread Krzysztof Kozlowski
On Sat, Oct 12, 2024 at 01:59:29AM +0530, Akhil P Oommen wrote: > Add a new schema which extends opp-v2 to support a new vendor specific > property required for Adreno GPUs found in Qualcomm's SoCs. The new > property called "qcom,opp-acd-level" carries a u32 value recommended > for each opp needs

Re: [PATCH RFC 3/3] arm64: dts: qcom: x1e80100: Add ACD levels for GPU

2024-10-14 Thread Krzysztof Kozlowski
On Sat, Oct 12, 2024 at 01:59:30AM +0530, Akhil P Oommen wrote: > Update GPU node to include acd level values. > > Signed-off-by: Akhil P Oommen > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 11 ++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dt

[PATCH 2/3] drm/msm: Allocate memory for disp snapshot with kvzalloc()

2024-10-14 Thread Douglas Anderson
With the "drm/msm: add a display mmu fault handler" series [1] we saw issues in the field where memory allocation was failing when allocating space for registers in msm_disp_state_dump_regs(). Specifically we were seeing an order 5 allocation fail. It's not surprising that order 5 allocations will

[PATCH 1/3] drm/msm: Avoid NULL dereference in msm_disp_state_print_regs()

2024-10-14 Thread Douglas Anderson
If the allocation in msm_disp_state_dump_regs() failed then `block->state` can be NULL. The msm_disp_state_print_regs() function _does_ have code to try to handle it with: if (*reg) dump_addr = *reg; ...but since "dump_addr" is initialized to NULL the above is actually a noop. The code then

[PATCH 3/3] drm/msm: Simplify NULL checking in msm_disp_state_dump_regs()

2024-10-14 Thread Douglas Anderson
The msm_disp_state_dump_regs(): - Doesn't allocate if the caller already allocated. ...but there's one caller and it doesn't allocate so we don't need this check. - Checks for allocation failure over and over even though it could just do it once right after the allocation. Clean this up. Sig

Re: [PATCH v2] drm/msm/dpu: don't always activate merge_3d block

2024-10-14 Thread Dmitry Baryshkov
On Sun, Oct 13, 2024 at 07:37:20PM -0700, Abhinav Kumar wrote: > Hi Dmitry > > On 10/13/2024 5:20 PM, Dmitry Baryshkov wrote: > > On Fri, Oct 11, 2024 at 10:25:13AM -0700, Jessica Zhang wrote: > > > Only enable the merge_3d block for the video phys encoder when the 3d > > > blend mode is not *_NON

Re: [PATCH 2/3] drm/msm: Allocate memory for disp snapshot with kvzalloc()

2024-10-14 Thread Abhinav Kumar
On 10/14/2024 9:36 AM, Douglas Anderson wrote: With the "drm/msm: add a display mmu fault handler" series [1] we saw issues in the field where memory allocation was failing when allocating space for registers in msm_disp_state_dump_regs(). Specifically we were seeing an order 5 allocation fail

Re: [PATCH 3/3] drm/msm: Simplify NULL checking in msm_disp_state_dump_regs()

2024-10-14 Thread Abhinav Kumar
On 10/14/2024 9:36 AM, Douglas Anderson wrote: The msm_disp_state_dump_regs(): - Doesn't allocate if the caller already allocated. ...but there's one caller and it doesn't allocate so we don't need this check. - Checks for allocation failure over and over even though it could just do it