On 9/14/2024 2:54 AM, Bjorn Andersson wrote:
On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote:
On 9/12/2024 1:32 AM, Bjorn Andersson wrote:
On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote:
The Qualcomm SA8775P platform comes with a DisplayPort control
On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote:
On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay
wrote:
In order to support different HW versions, introduce aux_cfg array
to move v4 specific aux configuration settings.
Signed-off-by: Soutrik Mukhopadhyay
---
v2: Fixed review comments from
On Tue, 17 Sept 2024 at 10:40, Soutrik Mukhopadhyay
wrote:
>
>
> On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote:
> > On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay
> > wrote:
> >> In order to support different HW versions, introduce aux_cfg array
> >> to move v4 specific aux configuration sett
This series implements preemption for A7XX targets, which allows the GPU to
switch to an higher priority ring when work is pushed to it, reducing latency
for high priority submissions.
This series enables L1 preemption with skip_save_restore which requires
the following userspace patches to functi
The bv_fence field of rbmemptrs was being used incorrectly as the BV
rptr shadow pointer in some places.
Add a bv_rptr field and change the code to use that instead.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/ms
With preemption it is not enough to track the current_ctx_seqno globally
as execution might switch between rings.
This is especially problematic when current_ctx_seqno is used to
determine whether a page table switch is necessary as it might lead to
security bugs.
Track current context per ring.
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 4
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
2 files
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml
b/drivers/gpu/drm/msm/registers/
This patch implements preemption feature for A6xx targets, this allows
the GPU to switch to a higher priority ringbuffer if one is ready. A6XX
hardware as such supports multiple levels of preemption granularities,
ranging from coarse grained(ringbuffer level) to a more fine grained
such as draw-cal
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm/m
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 6 ++
drivers/gpu/drm/msm/msm_gpu_trace.h |
Some userspace changes are necessary so add a flag for userspace to
advertise support for preemption when creating the submitqueue.
When this flag is not set preemption will not be allowed in the middle
of the submitted IBs therefore mantaining compatibility with older
userspace.
The flag is reje
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 98
1 file changed, 98 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation/
Initialize with 4 rings to enable preemption.
For now only on A750 as other targets require testing.
Add the "preemption_enabled" module parameter to override this for other
A7xx targets.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adre
In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.
The changes have not been merged yet in mesa but are necessary for this
series.
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml
On 17.09.2024 10:12 AM, Soutrik Mukhopadhyay wrote:
>
> On 9/14/2024 2:54 AM, Bjorn Andersson wrote:
>> On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote:
>>> On 9/12/2024 1:32 AM, Bjorn Andersson wrote:
On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote:
On 13.09.2024 9:51 PM, Rob Clark wrote:
> From: Rob Clark
>
> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> devices (x1-85, possibly others), it seems to pass that barrier while
> there are still things in the event completion FIFO waiting to be
> written back to memory.
C
On Tue, Sep 17, 2024 at 03:47:09PM +0200, Konrad Dybcio wrote:
> On 13.09.2024 9:51 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> > devices (x1-85, possibly others), it seems to pass that barrier while
> > there are still thi
On Tue, Sep 17, 2024 at 6:47 AM Konrad Dybcio wrote:
>
> On 13.09.2024 9:51 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> > devices (x1-85, possibly others), it seems to pass that barrier while
> > there are still things in t
/drm/msm/adreno/a6xx_hfi.c | 33 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 5 ++
7 files changed, 148 insertions(+), 1 deletion(-)
---
base-commit: 15302579373ed2c8ada629e9e7bcf9569393a48d
change-id: 20240917-a663-gpu-support-b1475c828606
Best regards,
--
Akh
From: Puranam V G Tejaswi
Add support for Adreno 663 found on sa8775p based platforms.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 19 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++-
drivers/gpu/d
From: Puranam V G Tejaswi
Document Adreno 663 GMU in the dt-binding specification.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/
From: Puranam V G Tejaswi
Add gpu and gmu nodes for sa8775p based platforms.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 8
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 75 ++
2 files chang
On Wed, Sep 18, 2024 at 02:08:43AM GMT, Akhil P Oommen wrote:
> From: Puranam V G Tejaswi
>
> Add gpu and gmu nodes for sa8775p based platforms.
Which platforms? The commit adds nodes to the SoC and the single RIDE
platform.
>
> Signed-off-by: Puranam V G Tejaswi
> Signed-off-by: Akhil P Oomm
On Wed, Sep 18, 2024 at 02:08:41AM GMT, Akhil P Oommen wrote:
> From: Puranam V G Tejaswi
>
> Add support for Adreno 663 found on sa8775p based platforms.
>
> Signed-off-by: Puranam V G Tejaswi
> Signed-off-by: Akhil P Oommen
> ---
> drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 19
m/msm/adreno/a6xx_gpu.c | 8 ++-
> drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 33 ++
> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 ++
> 7 files changed, 148 insertions(+), 1 deletion(-)
> ---
> base-commit: 15302579373ed2c8ada629e9e7bcf9569393a48d
> change-id: 20240917-a663-gpu-support-b1475c828606
>
> Best regards,
> --
> Akhil P Oommen
>
--
With best wishes
Dmitry
On 17.09.2024 5:30 PM, Rob Clark wrote:
> On Tue, Sep 17, 2024 at 6:47 AM Konrad Dybcio wrote:
>>
>> On 13.09.2024 9:51 PM, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
>>> devices (x1-85, possibly others), it seems to pass that b
On Tue, Sep 17, 2024 at 4:37 PM Konrad Dybcio wrote:
>
> On 17.09.2024 5:30 PM, Rob Clark wrote:
> > On Tue, Sep 17, 2024 at 6:47 AM Konrad Dybcio
> > wrote:
> >>
> >> On 13.09.2024 9:51 PM, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >>> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle
./drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c:282:2-3: Unneeded semicolon
This patch removes an unneeded semicolon after a switch statement in the
pll_get_post_div function. Adding a semicolon after a switch statement is
unnecessary and can lead to confusion in the code structure.
Reported-by: Aba
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