On Tue, Jun 11, 2024 at 02:26:12PM GMT, Dmitry Baryshkov wrote:
> On Tue, 11 Jun 2024 at 11:54, Maxime Ripard wrote:
> >
> > On Mon, Jun 10, 2024 at 08:54:09PM GMT, Dmitry Baryshkov wrote:
> > > On Mon, Jun 10, 2024 at 02:07:06PM +0200, Maxime Ripard wrote:
> > > > Hi,
> > > >
> > > > +Hans
> > >
On Thu, May 23, 2024 at 10:52:21AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Add an io-pgtable method to walk the pgtable returning the raw PTEs that
> would be traversed for a given iova access.
>
> Signed-off-by: Rob Clark
> ---
> drivers/iommu/io-pgtable-arm.c | 51 +
On 12/06/2024 20:43, Danila Tikhonov wrote:
> Document the DPU hardware found on the Qualcomm SM7150 platform.
In general, this should be before MDSS, because it defines fully the
compatibles already used in the MDSS schema. For multi-binding devices
it always starts with children and ends with pa
On 12/06/2024 20:43, Danila Tikhonov wrote:
> Document the MDSS hardware found on the Qualcomm SM7150 platform.
>
> Signed-off-by: Danila Tikhonov
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Thu, Jun 13, 2024 at 11:23:50AM +0200, Krzysztof Kozlowski wrote:
> On 12/06/2024 20:43, Danila Tikhonov wrote:
> > Document the DPU hardware found on the Qualcomm SM7150 platform.
>
> In general, this should be before MDSS, because it defines fully the
> compatibles already used in the MDSS sc
u_hw_intr_init(dev, dpu_kms->mmio,
dpu_kms->catalog);
if (IS_ERR(dpu_kms->hw_intr)) {
rc = PTR_ERR(dpu_kms->hw_intr);
---
base-commit: 03d44168cbd7fc57d5de56a3730427db758fc7f6
change-id: 20240613-dp-phy-sel-1b06dc48ed73
Best regards,
--
Dmitry Baryshkov
On Wed, Jun 12, 2024 at 06:17:37PM -0700, Abhinav Kumar wrote:
>
>
> On 6/12/2024 2:08 AM, Dmitry Baryshkov wrote:
> > On Wed, 12 Jun 2024 at 02:12, Abhinav Kumar
> > wrote:
> > >
> > >
> > >
> > > On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
> > > > Since SmartDMA planes provide two rectan
On Thu, Jun 13, 2024 at 04:02:24AM +0200, Marc Gonzalez wrote:
> On 12/06/2024 19:44, Vinod Koul wrote:
>
> > On 06-06-24, 18:07, Marc Gonzalez wrote:
> >
> >> HDMI TX block embedded in the APQ8098.
> >
> > This one too
>
> I assume this refers to:
> "Why is the patch titled display/msm, this is
On 13/06/2024 12:13, Dmitry Baryshkov wrote:
> On Thu, Jun 13, 2024 at 11:23:50AM +0200, Krzysztof Kozlowski wrote:
>> On 12/06/2024 20:43, Danila Tikhonov wrote:
>>> Document the DPU hardware found on the Qualcomm SM7150 platform.
>>
>> In general, this should be before MDSS, because it defines fu
From: Arnaud Vrac
Port device nodes from vendor code.
Signed-off-by: Arnaud Vrac
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 100 +-
1 file changed, 99 insertions(+), 1 deletion(-)
diff --git a/arch/a
80bc7fb439
change-id: 20240613-msm-pass-addfb25-bad-modifier-c461fd9c02bb
Best regards,
--
Dmitry Baryshkov
Make the DPU driver use the TE source specified in the DT. If none is
specified, the driver defaults to the first GPIO (mdp_vsync0).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 -
1 file changed, 43 insertions(+), 1 deletion(-)
Neither disp-enable-gpios nor disp-te-gpios are defined in the schema.
None of the board DT files use those GPIO pins. Drop them from the
driver.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 37 -
1 file
Setting vsync source makes sense only for DSI CMD panels. Pull the
is_cmd_mode condition out of the function into the calling code, so that
it becomes more explicit.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++---
1 file cha
Add enum dpu_vsync_source instead of a series of defines. Use this enum
to pass vsync information.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +-
drivers/gpu/drm/msm/disp/dp
Rename dpu_hw_setup_vsync_source functions to make the names match the
implementation: on DPU 5.x the TOP only contains timer setup, while 3.x
and 4.x used MDP_VSYNC_SEL register to select TE source.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 14 +++-
HDMI TX block embedded in the APQ8098.
Reviewed-by: Rob Herring (Arm)
Reviewed-by: Conor Dooley
Signed-off-by: Marc Gonzalez
---
.../devicetree/bindings/display/msm/hdmi.yaml | 28 --
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetr
The struct msm_display_info has is_te_using_watchdog_timer field which
is neither used anywhere nor is flexible enough to specify different
sources. Replace it with the field specifying the vsync source using
enum dpu_vsync_source.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
HDMI PHY block embedded in the APQ8098.
Acked-by: Rob Herring (Arm)
Signed-off-by: Marc Gonzalez
---
Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml
b/Documentation/dev
Command-mode DSI panels need to signal the display controlller when
vsync happens, so that the device can start sending the next frame. Some
devices (Google Pixel 3) use a non-default pin, so additional
configuration is required. Add a way to specify this information in DT
and handle it in the DSI
DT bits required for HDMI TX support in APQ8098 (msm8998 cousin)
Changes in v4:
- Collect tags since v3
- Reword patch 1 subject (Vinod)
- Link to v3:
https://lore.kernel.org/r/20240606-hdmi-tx-v3-0-9d7feb6d3...@freebox.fr
Changes in v3
- Address Rob's comments on patch 2:
- 'maxItems: 5' for
MSM8998 GPIO pin controller reference design defines:
- CEC: pin 31
- DDC: pin 32,33
- HPD: pin 34
Downstream vendor code for reference:
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400
mdss_hdmi_
On 2024-06-13 20:05:05, Dmitry Baryshkov wrote:
> Add enum dpu_vsync_source instead of a series of defines. Use this enum
> to pass vsync information.
>
> Reviewed-by: Abhinav Kumar
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
> drivers/gpu/drm/
On 2024-06-13 20:05:09, Dmitry Baryshkov wrote:
> Allow board's device tree to specify the vsync source (aka TE source).
> If the property is omitted, the display controller driver will use the
> default setting.
Well, that specific default handling is not really part of this patch, but
how a foll
On Thu, 13 Jun 2024 at 21:16, Marijn Suijten
wrote:
>
> On 2024-06-13 20:05:04, Dmitry Baryshkov wrote:
> > Command mode panels provide TE signal back to the DSI host to signal
> > that the frame display has completed and update of the image will not
> > cause tearing. Usually it is connected to t
er@invalid-bpp,Fail
kms_3d,Fail
-kms_addfb_basic@addfb25-bad-modifier,Fail
kms_lease@lease-uevent,Fail
tools_test@tools_test,Fail
---
base-commit: 6b4468b0c6ba37a16795da567b58dc80bc7fb439
change-id: 20240613-msm-pass-addfb25-bad-modifier-c461fd9c02bb
Best regards,
On 2024-06-13 20:05:07, Dmitry Baryshkov wrote:
> Setting vsync source makes sense only for DSI CMD panels. Pull the
> is_cmd_mode condition out of the function into the calling code, so that
> it becomes more explicit.
>
> Reviewed-by: Abhinav Kumar
> Signed-off-by: Dmitry Baryshkov
Reviewed-b
On 2024-06-13 20:05:06, Dmitry Baryshkov wrote:
> Neither disp-enable-gpios nor disp-te-gpios are defined in the schema.
> None of the board DT files use those GPIO pins. Drop them from the
> driver.
What's worse, when people set disp-te-gpios the
devm_gpiod_get_optional("disp-te", GPIOD_IN) below
Maybe retitle this to something that more closely resembles "remove unset
is_te_using_watchdog_timer field"?
On 2024-06-13 20:05:08, Dmitry Baryshkov wrote:
> The struct msm_display_info has is_te_using_watchdog_timer field which
> is neither used anywhere nor is flexible enough to specify differe
Command mode panels provide TE signal back to the DSI host to signal
that the frame display has completed and update of the image will not
cause tearing. Usually it is connected to the first GPIO with the
mdp_vsync function, which is the default. In such case the property can
be skipped.
Acked-by:
Allow board's device tree to specify the vsync source (aka TE source).
If the property is omitted, the display controller driver will use the
default setting.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi
On 6/13/2024 3:05 AM, Dmitry Baryshkov wrote:
On Wed, Jun 12, 2024 at 06:17:37PM -0700, Abhinav Kumar wrote:
On 6/12/2024 2:08 AM, Dmitry Baryshkov wrote:
On Wed, 12 Jun 2024 at 02:12, Abhinav Kumar wrote:
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Since SmartDMA planes provide tw
On 2024-06-13 20:05:11, Dmitry Baryshkov wrote:
> Rename dpu_hw_setup_vsync_source functions to make the names match the
> implementation: on DPU 5.x the TOP only contains timer setup, while 3.x
> and 4.x used MDP_VSYNC_SEL register to select TE source.
Yeah that was never really clear anymore aft
On 2024-06-13 20:05:04, Dmitry Baryshkov wrote:
> Command mode panels provide TE signal back to the DSI host to signal
> that the frame display has completed and update of the image will not
> cause tearing. Usually it is connected to the first GPIO with the
> mdp_vsync function, which is the defau
On Thu, 13 Jun 2024 at 21:17, Marijn Suijten
wrote:
>
> On 2024-06-13 20:05:05, Dmitry Baryshkov wrote:
> > Add enum dpu_vsync_source instead of a series of defines. Use this enum
> > to pass vsync information.
> >
> > Reviewed-by: Abhinav Kumar
> > Signed-off-by: Dmitry Baryshkov
> > ---
> > d
+++ b/drivers/gpu/drm/ci/xfails/msm-apq8096-fails.txt
> > @@ -4,6 +4,5 @@ device_reset@unbind-cold-reset-rebind,Fail
> > device_reset@unbind-reset-rebind,Fail
> > dumb_buffer@invalid-bpp,Fail
> > kms_3d,Fail
> > -kms_addfb_basic@addfb25-bad-modifier,Fail
> > kms_lease@lease-uevent,Fail
> > tools_test@tools_test,Fail
> >
> > ---
> > base-commit: 6b4468b0c6ba37a16795da567b58dc80bc7fb439
> > change-id: 20240613-msm-pass-addfb25-bad-modifier-c461fd9c02bb
> >
> > Best regards,
--
With best wishes
Dmitry
On 2024-06-13 20:05:10, Dmitry Baryshkov wrote:
> Make the DPU driver use the TE source specified in the DT. If none is
> specified, the driver defaults to the first GPIO (mdp_vsync0).
mdp_vsync_p?
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44
>
Unlike other compositors X.org allocates a single framebuffer covering
the whole screen space. This is not an issue with the single screens,
but with the multi-monitor setup 5120x4096 becomes a limiting factor.
Check the hardware-bound limitations and lift the FB max size to
16383x16383.
Signed-of
The dpu_plane_prepare_fb() already calls dpu_format_populate_layout().
Store the generated layout in the plane state and drop this call from
dpu_plane_sspp_update().
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 19 ---
Split dpu_format_populate_layout() into addess-related and
pitch/format-related parts.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c| 8 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 45 --
dri
The msm_kms_funcs::check_modified_format() callback is not used by the
driver. Drop it completely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 43 -
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 16 ---
drivers/gpu/drm/msm
Move a call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported as early as
possible.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
Make _dpu_crtc_setup_lm_bounds() check that CRTC width is not
overflowing LM requirements. Rename the function accordingly.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 17 +
1 file changed,
dpu_formats.c defines DPU_MAX_IMG_WIDTH and _HEIGHT, while
dpu_hw_catalog.h defines just MAX_IMG_WIDTH and _HEIGHT. Merge these
constants to remove duplication.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 3 ---
drivers/gpu/drm
Lift mode_config limits set by the DPU driver to the actual FB limits as
handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs,
to the drm_crtc_helper_funcs::mode_valid() callback.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 15 +++
The dpu_crtc_atomic_check() already calls the function
_dpu_crtc_check_and_setup_lm_bounds(). There is no need to call it
again from dpu_crtc_atomic_begin().
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers
Check that the plane pitch doesn't overflow the maximum pitch size
allowed by the hardware.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 +-
2 files changed, 7 insertions(+)
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Make _dpu_crtc_setup_lm_bounds() check that CRTC width is not
overflowing LM requirements. Rename the function accordingly.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
The msm_kms_funcs::check_modified_format() callback is not used by the
driver. Drop it completely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 43 -
drivers/gpu/drm/msm/disp/dpu
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Lift mode_config limits set by the DPU driver to the actual FB limits as
handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs,
to the drm_crtc_helper_funcs::mode_valid() callback.
Signed-off-by: Dmitry Baryshkov
---
drivers/gp
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Move a call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported as early as
possible.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 ++
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
The dpu_crtc_atomic_check() already calls the function
_dpu_crtc_check_and_setup_lm_bounds(). There is no need to call it
again from dpu_crtc_atomic_begin().
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
On 6/13/24 17:15, Marc Gonzalez wrote:
From: Arnaud Vrac
Port device nodes from vendor code.
Signed-off-by: Arnaud Vrac
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
[...]
+
+ hdmi: hdmi-tx@c9a {
+ compatible =
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