On Mon, 27 May 2024, Geert Uytterhoeven wrote:
Below is the list of build error/warning regressions/improvements in
v6.10-rc1[1] compared to v6.9[2].
Summarized:
- build errors: +27/-20
- build warnings: +3/-1601
Happy fixing! ;-)
Thanks to the linux-next team for providing the build service
On Thu, 23 May 2024 at 18:14, Marc Gonzalez wrote:
>
> From: Arnaud Vrac
>
> Ported from the downstream driver.
>
> Signed-off-by: Arnaud Vrac
> Signed-off-by: Marc Gonzalez
> ---
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/hdmi/hdmi.c | 1 +
> drivers/
On 27/05/2024 14:11, Dmitry Baryshkov wrote:
On Thu, 23 May 2024 at 18:14, Marc Gonzalez wrote:
From: Arnaud Vrac
Ported from the downstream driver.
Signed-off-by: Arnaud Vrac
Signed-off-by: Marc Gonzalez
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/hdmi/hd
This is follow up update to Jonathan's patch set.
Changes vs V4:
- Polish width calculation with helper function
- Split cfg2 compression bit into another patch
Changes vs V3:
- Rebase to latest msm-next-lumag branch.
- Drop the slice_per_pkt change as it does impact basic DSC feature.
- Remove c
From: Jonathan Marek
Add width change in DPU timing for DSC compression case to work with
DSI video mode.
Signed-off-by: Jonathan Marek
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 8
data is valid for only half the active window if widebus
is enabled
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index
Enable compression bit in cfg2 register for DSC in the DSI case
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index f9722142
From: Jonathan Marek
The value returned by msm_dsi_wide_bus_enabled() doesn't match what the
driver is doing in video mode. Fix that by actually enabling widebus for
video mode.
Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI")
Signed-off-by: Jonathan Marek
Reviewed-by: Dmitry Baryshk
From: Jonathan Marek
Video mode DSC won't work if this field is not set correctly. Set it to fix
video mode DSC (for slice_per_pkt==1 cases at least).
Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration")
Signed-off-by: Jonathan Marek
Reviewed-by: Dmitry Baryshkov
Signed-off-b
From: Jonathan Marek
Make it clear why the pkt_per_line value is being "divided by 2".
Signed-off-by: Jonathan Marek
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi
On Mon, May 27, 2024 at 02:39:35PM +0200, Arnaud Vrac wrote:
> On 27/05/2024 14:11, Dmitry Baryshkov wrote:
> > On Thu, 23 May 2024 at 18:14, Marc Gonzalez wrote:
> > >
> > > From: Arnaud Vrac
> > >
> > > Ported from the downstream driver.
> > >
> > > Signed-off-by: Arnaud Vrac
> > > Signed-o
On Mon, May 27, 2024 at 10:21:47PM +0800, Jun Nie wrote:
> From: Jonathan Marek
>
> Add width change in DPU timing for DSC compression case to work with
> DSI video mode.
>
> Signed-off-by: Jonathan Marek
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |
On Mon, May 27, 2024 at 10:21:48PM +0800, Jun Nie wrote:
> data is valid for only half the active window if widebus
> is enabled
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/d
On Mon, May 27, 2024 at 10:21:49PM +0800, Jun Nie wrote:
> Enable compression bit in cfg2 register for DSC in the DSI case
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 4
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Dmitry Baryshkov
--
With best
On Sun, 21 Jan 2024 20:40:58 +0100, Adam Skladowski wrote:
> This patch series provide support for display subsystem, gpu
> and also adds wireless connectivity subsystem support.
>
> Adam Skladowski (8):
> arm64: dts: qcom: msm8976: Add IOMMU nodes
> dt-bindings: dsi-controller-main: Documen
On Wed, 15 May 2024 16:27:44 +0200, Marc Gonzalez wrote:
> 15 qcom platform DTSI files define an adreno_smmu node.
> msm8998 is the only one with adreno_smmu disabled by default.
>
> There's no reason why this SMMU should be disabled by default,
> it doesn't need any further configuration.
>
>
Hi Maintainers,
There are some flaky tests reported for msm driver testing in drm-ci for
the below boards.
*)
# Board Name: apq8096-db820c
# IGT Version: 1.28-g0df7b9b97
# Linux Version: 6.9.0-rc7
# Failure Rate: 50
dumb_buffer@create-clear
*)
# Board Name: sc7180-trogdor-kingoftown
# IGT Ver
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