On 06/03/2023 12:07, Johan Hovold wrote:
This reverts commit 8636500300a01740d92b345c680b036b94555b1b.
A recent commit tried to address a drm device leak in the early
msm_drm_uninit() error paths but ended up making things worse.
Specifically, it moved the drm device reference put in msm_drm_un
On 06/03/2023 12:07, Johan Hovold wrote:
This reverts commit 643b7d0869cc7f1f7a5ac7ca6bd25d88f54e31d0.
A recent patch that tried to fix up the msm_drm_init() paths with
respect to the workqueue but only ended up making things worse:
First, the newly added calls to msm_drm_uninit() on early erro
On 06/03/2023 12:07, Johan Hovold wrote:
Add the missing sanity check to handle workqueue allocation failures.
Fixes: c8afe684c95c ("drm/msm: basic KMS driver for snapdragon")
Cc: sta...@vger.kernel.org # 3.12
Cc: Rob Clark
Signed-off-by: Johan Hovold
---
drivers/gpu/drm/msm/msm_drv.c |
On 06/03/2023 12:07, Johan Hovold wrote:
Make sure to destroy the workqueue also in case of early errors during
bind (e.g. a subcomponent failing to bind).
Since commit c3b790ea07a1 ("drm: Manage drm_mode_config_init with
drmm_") the mode config will be freed when the drm device is released
also
On 26/01/2023 02:07, Abhinav Kumar wrote:
On 1/18/2023 5:00 AM, Dmitry Baryshkov wrote:
Move a call to dsi_calc_pclk() out of calc_clk_rate directly towards
msm_dsi_host_get_phy_clk_req(). It is called for both 6g and v2 hosts.
Also, while we are at it, replace another dsi_get_pclk_rate() inv
On 21/03/2023 04:58, Leonard Lausen wrote:
Commit da7716a249b699978fb5 ("drm/msm/dpu: Add support for XR30 format") enabled
support for the 10-bit XR30 color format but missed enabling support for the
corresponding per-pixel alpha-blending AR30 color format.
Declaring only XR30 but not AR30 colo
On 16/03/2023 18:16, Dmitry Baryshkov wrote:
From: Abhinav Kumar
Lets print the multirect_index as well in _dpu_crtc_blend_setup_pipe()
as it will give the complete information of the sw_pipe as well.
Signed-off-by: Abhinav Kumar
For the sake of completeness:
Reviewed-by: Dmitry Baryshkov
On 16/03/2023 18:16, Dmitry Baryshkov wrote:
From: Abhinav Kumar
After cleaning up the older multirect support the function
dpu_plane_validate_multirect_v2() is unused. Lets remove it.
Signed-off-by: Abhinav Kumar
[DB: also drop struct dpu_multirect_plane_states and R0/R1/R_MAX]
Signed-off-by
On 08/03/2023 15:52, Rob Clark wrote:
From: Rob Clark
This consists of simply storing the most recent deadline, and adding an
ioctl to retrieve the deadline. This can be used in conjunction with
the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various
sw_sync fences, merge them
On 08/03/2023 15:53, Rob Clark wrote:
From: Rob Clark
Add a new flag to let userspace provide a deadline as a hint for syncobj
and timeline waits. This gives a hint to the driver signaling the
backing fences about how soon userspace needs it to compete work, so it
can addjust GPU frequency a
On 25/03/2023 00:00, Rob Clark wrote:
From: Rob Clark
If userspace asked for a timeout greater than zero, but less than a
jiffy, they clearly weren't planning on spinning. So it is better
to round up to one.
This fixes an issue with supertuxkart that was (for some reason)
spinning on a gl syn
On 14/03/2023 17:28, Konrad Dybcio wrote:
Before transitioning to using per-SoC and not per-Adreno speedbin
fuse values (need another patchset to land elsewhere), a good
improvement/stopgap solution is to use adreno_is_aXYZ macros in
place of explicit revision matching. Do so to allow differentia
On 14/03/2023 17:28, Konrad Dybcio wrote:
A619_holi is implemented on at least two SoCs: SM4350 (holi) and SM6375
(blair). This is what seems to be a first occurrence of this happening,
but it's easy to overcome by guarding the SoC-specific fuse values with
of_machine_is_compatible(). Do just tha
On 14/03/2023 17:28, Konrad Dybcio wrote:
A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125
(trinket) and SM6225 (khaje). Trinket does not support speed binning
(only a single SKU exists) and we don't yet support khaje upstream.
Hence, add a fuse mapping table for bengal to allo
On 14/03/2023 17:28, Konrad Dybcio wrote:
Currently we're only deasserting REG_A6XX_RBBM_GBIF_HALT, but we also
need REG_A6XX_GBIF_HALT to be set to 0. For GMU-equipped GPUs this is
done in a6xx_bus_clear_pending_transactions(), but for the GMU-less
ones we have to do it *somewhere*. Unhalting bo
On Tue, Mar 28, 2023 at 8:28 AM Dmitry Baryshkov
wrote:
>
> On 25/03/2023 00:00, Rob Clark wrote:
> > From: Rob Clark
> >
> > If userspace asked for a timeout greater than zero, but less than a
> > jiffy, they clearly weren't planning on spinning. So it is better
> > to round up to one.
> >
> >
On Tue, 14 Mar 2023 08:20:50 +, Colin Ian King wrote:
> There is a spelling mistake in a drm_dbg_dp message. Fix it.
>
>
Applied, thanks!
[1/1] drm/msm/dp: Fix spelling mistake "Capabiity" -> "Capability"
https://gitlab.freedesktop.org/lumag/msm/-/commit/6ee9666a4f4c
Best regards,
On Wed, 18 Jan 2023 03:04:25 +0200, Dmitry Baryshkov wrote:
> The commit 92bab9142456 ("drm/msm: less magic numbers in
> msm_mdss_enable") reworked the static UBWC setup to replace magic
> numbers with calulating written values from the SoC/device parameters.
> This simplified adding new platform
On Thu, 26 Jan 2023 17:09:12 -0800, Douglas Anderson wrote:
> The DP AUX interrupt handling was a bit of a mess.
> * There were two functions (one for "native" transfers and one for
> "i2c" transfers) that were quite similar. It was hard to say how
> many of the differences between the two fu
On Sat, 18 Mar 2023 14:42:46 +0100, Konrad Dybcio wrote:
> v5 -> v6:
> - Squash both fixes that concerned the deprecated QCM2290 compatible to
> avoid warnings
>
> v5:
> https://lore.kernel.org/r/20230307-topic-dsi_qcm-v5-0-9d4235b77...@linaro.org
>
> v4 -> v5:
> - Drop superfluous items: le
On Fri, 24 Feb 2023 18:41:32 -0300, Maíra Canal wrote:
> As lima_gem_add_deps() performs the same steps as
> drm_sched_job_add_syncobj_dependency(), replace the open-coded
> implementation in Lima in order to simply use the DRM function.
>
>
Applied, thanks!
[2/2] drm/msm: Use drm_sched_job_a
On Mon, 06 Mar 2023 10:06:33 +0100, Geert Uytterhoeven wrote:
> With gcc-5 and CONFIG_UBSAN_SHIFT=y:
>
> drivers/gpu/drm/msm/msm_mdss.c: In function 'msm_mdss_enable':
> drivers/gpu/drm/msm/msm_mdss.c:296:2: error: case label does not reduce
> to an integer constant
> case DPU_HW_
On Mon, 09 Jan 2023 11:15:17 +0100, Neil Armstrong wrote:
> This adds support for the MDSS/DPU/DSI on the Qualcomm SM8550 platform.
>
> This patchset is based on the SM8450 display support serie at [1].
>
> In order to work, the following patchsets are required:
> - PM8550 LDO fix at [2]
> - DI
On Tue, 21 Mar 2023 02:58:04 +, Leonard Lausen wrote:
> Commit da7716a249b699978fb5 ("drm/msm/dpu: Add support for XR30 format")
> enabled
> support for the 10-bit XR30 color format but missed enabling support for the
> corresponding per-pixel alpha-blending AR30 color format.
>
> Declaring
On Fri, 24 Mar 2023 10:28:45 +0100, Neil Armstrong wrote:
> A few fixes to pass the DT bindings check successfully
> for sm8450 qrd & hdk DTs.
>
> The following are still needed to pass all the checks:
> -
> https://lore.kernel.org/r/20230308082424.140224-3-manivannan.sadhasi...@linaro.org
> -
On Tue, 21 Feb 2023 10:42:52 -0800, Jessica Zhang wrote:
> Move TE setup to prepare_for_kickoff() and remove empty prepare_commit()
> functions in both MDP4 and DPU drivers.
>
> Changes in V2:
> - Added changes to remove empty prepare_commit() functions
>
> Changes in V3:
> - Reordered "drm/msm
On Thu, 16 Mar 2023 19:16:21 +0300, Dmitry Baryshkov wrote:
> This patchset brings in multirect usage to support using two SSPP
> rectangles for a single plane. Full virtual planes support is omitted
> from this pull request, it will come later (I'm at the final stages of
> polishing and testing,
On Mon, 06 Mar 2023 11:07:12 +0100, Johan Hovold wrote:
> I had reasons to look closer at the MSM DRM driver error handling and
> realised that it had suffered from a fair amount of bit rot over the
> years.
>
> Unfortunately, I started fixing this in my 6.2 branch and failed to
> notice two par
On Fri, 17 Mar 2023 16:06:31 +0100, Neil Armstrong wrote:
> Switch the QMP PHY to the newly documented USB3/DP Combo PHY
> bindings at [1] and add the DP controller nodes.
>
> The DP output is shared with the USB3 SuperSpeed lanes and is
> usually connected to an USB-C port which Altmode is cont
On Sun, 26 Mar 2023 09:38:13 -0700, Rob Clark wrote:
> Clashes with C++ `or` keyword
>
>
Applied, thanks!
[1/1] drm/msm: Rename drm_msm_gem_submit_reloc::or in C++ code
https://gitlab.freedesktop.org/lumag/msm/-/commit/be7772e53681
Best regards,
--
Dmitry Baryshkov
On Fri, 27 Jan 2023 02:14:47 -0800, Kalyan Thota wrote:
> Flush mechanism for DSPP blocks has changed in sc7280 family, it
> allows individual sub blocks to be flushed in coordination with
> master flush control.
>
> Representation: master_flush && (PCC_flush | IGC_flush .. etc )
>
> This chang
On Fri, 24 Mar 2023 15:00:13 -0700, Rob Clark wrote:
> If userspace asked for a timeout greater than zero, but less than a
> jiffy, they clearly weren't planning on spinning. So it is better
> to round up to one.
>
> This fixes an issue with supertuxkart that was (for some reason)
> spinning on
On Mon, 13 Feb 2023 11:48:15 -0800, Jessica Zhang wrote:
> Move TE setup to prepare_for_kickoff() and remove empty prepare_commit()
> functions in both MDP4 and DPU drivers.
>
> Changes in V2:
> - Added changes to remove empty prepare_commit() functions
>
> Changes in V3:
> - Reordered "drm/msm
On 3/24/23 02:54, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Selecting CONFIG_PM_GENERIC_DOMAINS causes a build failure when CONFIG_PM
> is not enabled:
>
> WARNING: unmet direct dependencies detected for PM_GENERIC_DOMAINS
> Depends on [n]: PM [=n]
> Selected by [m]:
> - DRM_MSM [=
After cross-checking DSC models (20150914, 20161212, 20210623) change
values in rc_parameters tables to follow config files present inside
the DSC model. Handle two places, where i915 tables diverged from the
model, by patching the rc values in the code.
Note: I left one case uncorrected, 8bpp/10b
Other platforms (msm) will benefit from sharing the DSC config setup
functions. This series moves parts of static DSC config data from the
i915 driver to the common helpers to be used by other drivers.
Note: the RC parameters were cross-checked against config files found in
DSC model 2021062, 2016
Stop using an interim structure rc_parameters for storing calculated
params and then setting drm_dsc_config using that structure. Instead put
calculated params into the struct drm_dsc_config directly.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/i915/display/inte
Move DSC RC tables to DRM DSC helper. No additional code changes
and/or cleanups are a part of this commit, it will be cleaned up in the
followup commits.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 372 ++
drivers
The array of rc_parameters contains a mixture of parameters from DSC 1.1
and DSC 1.2 standards. Split these tow configuration arrays in
preparation to adding more configuration data.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 127 ++
drive
Add a helper setting config values which are typically constant across
operating modes (table E-4 of the standard) and mux_word_size (which is
a const according to 3.5.2).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 21 +
include/drm/display
Next commits are going to add support for additional RC parameter lookup
tables. These tables are going to use different bpp/bpc combinations,
thus it makes little sense to keep the 2d array for RC parameters.
Switch to using the flat array.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshko
The rc_buf_thresh values are common to all DSC implementations. Move
them to the common helper together with the code to propagage them to
the drm_dsc_config.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 35 +++
dri
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations,
include them here for completeness.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 72
1 file changed, 72 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dsc_
Use new DRM DSC helpers to setup DSI DSC configuration. The
initial_scale_value needs to be adjusted according to the standard, but
this is a separate change.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 61 --
1 file changed, 8 insertions(
Include RC parameters for YCbCr 4:2:2 and 4:2:0 configurations.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 438 +++
include/drm/display/drm_dsc_helper.h | 2 +
2 files changed, 440 insertions(+)
diff --git a/drivers/gpu/drm/display/d
The variable ring is not used by msm_parse_deps() and
msm_ioctl_gem_submit() and thus can be dropped.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_gem_submit.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
b/drivers/
As discusssed in the the review of [1], rework these two functions to
separate single point parser and provide clean error path.
Depenencies: [1], [2]
[1] https://lore.kernel.org/all/20230215235048.1166484-1-robdcl...@gmail.com
[2] https://patchwork.freedesktop.org/patch/524090/?series=114362&rev
Simplify two functions msm_parse_deps() and msm_parse_post_deps():
extract single item parsing function and clean up error path.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_gem_submit.c | 186 +++
1 file changed, 101 insertions(+), 85 deletions(-)
diff --
On 14.03.2023 16:28, Konrad Dybcio wrote:
> v3 -> v4:
> - Drop the mistakengly-included and wrong A3xx-A5xx bindings changes
> - Improve bindings commit messages to better explain what GMU Wrapper is
> - Drop the A680 highest bank bit value adjustment patch
> - Sort UBWC config variables in a re
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