On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add interconnects required for the SDM845 MDSS device tree node. This
> change was made in the commit c8c61c09e38b ("arm64: dts: qcom: sdm845:
> Add interconnects property for display"), but was not reflected in the
> schema.
Reviewed-by: Krzysztof K
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>
> Note, this removes description of individual DPU port@ nodes. However
> such definitions add no additional value. The reg values do not
> correspond to hardware INTF indices. The d
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>
> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> will be added later, once msm8998 gains interconnect support.
>
> Signed-off-by: Dmitry Baryshkov
> -
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>
> This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> will be added later, once msm8998 gains interconnect support.
>
> Signed-off-by: Dmitry Baryshkov
> -
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> In order to make the schema more readable, split dpu-sc7180 into the DPU
> and MDSS parts, each one describing just a single device binding.
>
> Signed-off-by: Dmitry Baryshkov
Thank you for your patch. There is something to discuss/improve.
> +--
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS
> schemas.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Dmitry Baryshkov
> ---
> .../display/msm/qcom,msm8998-mdss.yaml| 12 +
> .../display/msm/qcom,qcm2290-mdss.ya
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
> SM8250 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/mdss-common.yaml | 4 +-
> .../bindings/display/msm/qcom,sm8250-dpu.yaml | 92 +++
On Thu, 22 Sept 2022 at 10:02, Krzysztof Kozlowski
wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > Move properties common to all DPU DT nodes to the dpu-common.yaml.
> >
> > Note, this removes description of individual DPU port@ nodes. However
> > such definitions add no additional val
On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > Move properties common to all MDSS DT nodes to the mdss-common.yaml.
> >
> > This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
> > will be added later, once msm8998
On Thu, 22 Sept 2022 at 10:08, Krzysztof Kozlowski
wrote:
>
> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
> > In order to make the schema more readable, split dpu-sc7180 into the DPU
> > and MDSS parts, each one describing just a single device binding.
> >
> > Signed-off-by: Dmitry Baryshkov
>
>
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions
with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm
variants inside the common 5+7nm driver.
Co-developed-by: Robert Foss
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 6 +-
dr
This adds support for the MDSS/DPU/DSI on the Qualcomm SM8450 platform.
Dmitry Baryshkov (5):
drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450
drm/msm/dsi: add support for DSI 2.6.0
drm/msm/dpu: add support for MDP_TOP blackhole
drm/msm/dpu: add support for SM8450
drm/msm: mdss
Add support for the MDSS block on SM8450 platform.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_mdss.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index e13c5c12b775..9e011762396b 100644
--- a/drivers/
On sm8450 a register block was removed from MDP TOP. Accessing it during
snapshotting results in NoC errors / immediate reboot. Skip accessing
these registers during snapshot.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
drivers/gpu/drm/msm/disp/dpu1
Add definitions for the display hardware used on Qualcomm SM8450
platform.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 224 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 3 +
dri
Add support for DSI 2.6.0 (block used on sm8450).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 7e9
On 22/09/2022 09:50, Dmitry Baryshkov wrote:
> On Thu, 22 Sept 2022 at 10:02, Krzysztof Kozlowski
> wrote:
>>
>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>>>
>>> Note, this removes description of individual DPU port@ nodes.
On 22/09/2022 09:53, Dmitry Baryshkov wrote:
> On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
> wrote:
>>
>> On 15/09/2022 15:37, Dmitry Baryshkov wrote:
>>> Move properties common to all MDSS DT nodes to the mdss-common.yaml.
>>>
>>> This extends qcom,msm8998-mdss schema to allow interconnect
On 22-09-22, 14:30, Dmitry Baryshkov wrote:
> This adds support for the MDSS/DPU/DSI on the Qualcomm SM8450 platform.
Tested this on DM8450-HDK with HDMI and it works for me.
For whole series:
Tested-by: Vinod Koul
Reviewed-by: Vinod Koul
>
> Dmitry Baryshkov (5):
> drm/msm/dsi: add suppor
On 22/09/2022 10:04, Krzysztof Kozlowski wrote:
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
Move properties common to all MDSS DT nodes to the mdss-common.yaml.
This extends qcom,msm8998-mdss schema to allow interconnect nodes, which
will be added later, once msm8998 gains interconnect support
On 22/09/2022 14:43, Krzysztof Kozlowski wrote:
On 22/09/2022 09:53, Dmitry Baryshkov wrote:
On Thu, 22 Sept 2022 at 10:05, Krzysztof Kozlowski
wrote:
On 15/09/2022 15:37, Dmitry Baryshkov wrote:
Move properties common to all MDSS DT nodes to the mdss-common.yaml.
This extends qcom,msm8998-
On 22/09/2022 12:30, Dmitry Baryshkov wrote:
>>> +display-subsystem@ae0 {
>>> +#address-cells = <1>;
>>> +#size-cells = <1>;
>>> +compatible = "qcom,sc7180-mdss";
>>> +reg = <0xae0 0x1000>;
>>> +reg-names = "mdss";
>>> +power-domains = <&d
On 22/09/2022 13:47, Dmitry Baryshkov wrote:
missing allOf
>>>
>>> Rob asked to remove this while reviewing v6 ([1]). And indeed the
>>> allOf's around a single $ref do not seem to be necessary
>>
>> He commented on one of properties, not top-level, maybe it is different
>> case for dtsc
On 22/09/2022 13:46, Dmitry Baryshkov wrote:
>>> - ranges: true
>>> +maxItems: 2
>>>
>>> interconnects:
>>> -items:
>>> - - description: Interconnect path from mdp0 port to the data bus
>>> - - description: Interconnect path from mdp1 port to the data bus
>>> +maxItems
Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code.
No functional change.
Signed-off-by: Liu Shixin
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/
On 22/09/2022 02:14, Bjorn Andersson wrote:
> On Tue, Sep 20, 2022 at 09:09:13AM +0200, Krzysztof Kozlowski wrote:
>> On 19/09/2022 23:18, Bjorn Andersson wrote:
>>> On Sat, Sep 17, 2022 at 06:03:27PM +0100, Krzysztof Kozlowski wrote:
On 16/09/2022 21:00, Bjorn Andersson wrote:
> From: Bjo
.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Dmitry-Baryshkov/drm-msm-add-support-for-SM8450/20220922-1
Hi Dave & Daniel,
Here is the main drm/msm pull for v6.1, description below and in tag.
The following changes since commit 1c23f9e627a7b412978b4e852793c5e3c3efc555:
Linux 6.0-rc2 (2022-08-21 17:32:54 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/msm.git
Hi Dmitry,
On Montag, 20. Juni 2022 23:30:51 CEST Dmitry Baryshkov wrote:
> The rest of the code expects that master's device drvdata is the
> struct msm_drm_private instance. Do not override the mdp5's drvdata.
>
> Fixes: 6874f48bb8b0 ("drm/msm: make mdp5/dpu devices master components")
> Signed
On 9/13/2022 1:53 AM, Johan Hovold wrote:
The bridge counter was never reset when tearing down the DRM device so
that stale pointers to deallocated structures would be accessed on the
next tear down (e.g. after a second late bind deferral).
Given enough bridges and a few probe deferrals this c
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Add the missing sanity check on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and
disable")
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Add the missing sanity check on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
Cc: sta...@vger.kernel.or
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Add the missing sanity check on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
Fixes: a3376e3ec81c ("drm/msm: convert to drm_bridge")
Cc: sta...@vger.kernel.org # 3.1
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the DP IRQ, which w
On 13/09/2022 11:53, Johan Hovold wrote:
Add the missing sanity check on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and
disable")
Cc:
On 13/09/2022 11:53, Johan Hovold wrote:
Add the missing sanity check on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
Cc: sta...@vger.kernel.org
On 13/09/2022 11:53, Johan Hovold wrote:
Add the missing sanity check on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
Fixes: a3376e3ec81c ("drm/msm: convert to drm_bridge")
Cc: sta...@vger.kernel.org # 3.12
S
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the HDMI IRQ, which
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind t
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Drop the overly defensive modeset sanity checks of function parameters
which have already been checked or used by the callers.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Johan Hovold
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drive
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Drop the overly defensive modeset sanity checks of function parameters
which have already been checked or used by the callers.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Johan Hovold
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drive
On 9/13/2022 1:53 AM, Johan Hovold wrote:
The bridge counter was never reset when tearing down the DRM device so
that stale pointers to deallocated structures would be accessed on the
next tear down (e.g. after a second late bind deferral).
Given enough bridges and a few probe deferrals this c
On 9/13/2022 5:36 AM, Doug Anderson wrote:
Hi,
On Tue, Sep 13, 2022 at 9:58 AM Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is
On Thu, Sep 22, 2022 at 12:55:03PM -0700, Kuogee Hsieh wrote:
>
> On 9/13/2022 1:53 AM, Johan Hovold wrote:
> > Device-managed resources allocated post component bind must be tied to
> > the lifetime of the aggregate DRM device or they will not necessarily be
> > released when binding of the aggre
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