On Wed, 30 Mar 2022 at 02:00, Rob Clark wrote:
>
> From: Rob Clark
>
> There was only a single user, which could just as easily stash the iova
> when pinning.
>
> Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/msm_fb.c | 16 ++--
> drivers/gpu
On Wed, 30 Mar 2022 at 02:00, Rob Clark wrote:
>
> From: Rob Clark
>
> Prep for a following patch. While we are at it, convert a few remaining
> WARN_ON()s to GEM_WARN_ON().
Well... GEM_WARN_ON doesn't really look like a 'while we are at it'.
It might be better to split it into a separate commi
This series adds support for generic eDP panel over aux_bus.
These changes are dependent on the following series in order:
https://patchwork.kernel.org/project/linux-arm-msm/list/?series=620127&state=*
https://patchwork.kernel.org/project/linux-arm-msm/list/?series=616587&state=*
https://patchwork
This patch adds support for generic eDP sink through aux_bus. The eDP/DP
controller driver should support aux transactions originating from the
panel-edp driver and hence should be initialized and ready.
The panel bridge supporting the panel should be ready before the bridge
connector is initializ
The source device should ensure the sink is ready before proceeding to
read the sink capability or performing any aux transactions. The sink
will indicate its readiness by asserting the HPD line. The controller
driver needs to wait for the hpd line to be asserted by the sink before
performing any a
The panel-edp enables the eDP panel power during probe, get_modes
and enable. The eDP connect and disconnect interrupts for the eDP/DP
controller are directly dependent on panel power. As eDP display can be
assumed as always connected, the controller driver can skip the eDP
connect and disconnect i
The interrupt register will still reflect the connect and disconnect
interrupt status without generating an actual HW interrupt.
The controller driver should not handle those masked interrupts.
Signed-off-by: Sankeerth Billakanti
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 5 +++--
1 file changed,
The aux_bus support with the dp_display driver will enable the dp
resources during msm_dp_modeset_init. The host_init has to return early
if the core is already initialized to prevent putting an additional vote
for the dp controller resources.
Signed-off-by: Sankeerth Billakanti
---
drivers/gpu/
Remove the unnecessary delay in executing the EV_HPD_INIT_SETUP event.
Signed-off-by: Sankeerth Billakanti
---
drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index
Some eDP sinks or platform boards will not support hpd.
This patch adds support for those cases.
Signed-off-by: Sankeerth Billakanti
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c
b
The panel-edp driver modes needs to be validated differently from DP
because the link capabilities are not available for EDP by that time.
Signed-off-by: Sankeerth Billakanti
---
drivers/gpu/drm/msm/dp/dp_display.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/
On Wed, Mar 30, 2022 at 4:32 AM Dmitry Baryshkov
wrote:
>
> On Wed, 30 Mar 2022 at 02:00, Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > Prep for a following patch. While we are at it, convert a few remaining
> > WARN_ON()s to GEM_WARN_ON().
>
> Well... GEM_WARN_ON doesn't really look like a
When building with CONFIG_PM=y and CONFIG_PM_SLEEP=n (such as ARCH=riscv
allmodconfig), the following warnings/errors occur:
drivers/gpu/drm/msm/adreno/adreno_device.c:679:12: error:
'adreno_system_resume' defined but not used [-Werror=unused-function]
679 | static int adreno_system_resume(
From: Rob Clark
The first six paches are various cleanups and simplifications. The
next two get rid of redundant vma lookups in the submit and retire
paths. Following that, fenced vma lets us indicate a fence value
following which the vma is no longer used, which is needed because
otherwise use
From: Rob Clark
These belong more cleanly in the gem header.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.h | 23 ---
drivers/gpu/drm/msm/msm_gem.h | 22 ++
2 files changed, 22 insertions(+), 23 deletions(-)
di
From: Rob Clark
The ring seqno counter duplicates the fence-context last_fence counter.
They end up getting incremented in lock-step, on the same scheduler
thread, but the split just makes things less obvious.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
drivers
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c
b/drivers/gpu/drm/msm/msm_gem_vma.c
index f914ddbaea89..64906594fc65 100644
--- a/drivers/gpu/drm/msm/
From: Rob Clark
Prep for a following patch, where it gets a bit more complicated.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 2 +-
drivers/gpu/drm/msm/msm_gem.h | 1 +
drivers/gpu/drm/msm/msm_gem_vma.c | 9 +++--
3 files changed, 9 insertions(+), 3 deletions(-)
d
From: Rob Clark
Get rid of all the unnecessary conversion between address/size and page
offsets. It just confuses things.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
drivers/gpu/drm/msm/msm_gem.c | 5 ++---
drivers/gpu/dr
From: Rob Clark
Combines duplicate vma lookup in the get_and_pin path.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 50 ++-
1 file changed, 26 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_ge
From: Rob Clark
There was only a single user, which could just as easily stash the iova
when pinning.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_fb.c | 16 ++--
drivers/gpu/drm/msm/msm_gem.c | 16
drivers/gpu/drm/msm/msm_ge
From: Rob Clark
This way we only lookup vma once per object per submit, for both the
submit and retire path.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c| 60 +---
drivers/gpu/drm/msm/msm_gem.h| 9 +++--
drivers/gpu/drm/msm/msm_gem_submit.
From: Rob Clark
With userspace allocated iova (next patch), we can have a race condition
where userspace observes the fence completion and deletes the vma before
retire_submit() gets around to unpinning the vma. To handle this, add a
fenced unpin which drops the refcount but tracks the fence, an
From: Rob Clark
The motivation at this point is mainly native userspace mesa driver in a
VM guest. The one remaining synchronous "hotpath" is buffer allocation,
because guest needs to wait to know the bo's iova before it can start
emitting cmdstream/state that references the new bo. By allocati
On Wed, 30 Mar 2022 at 19:04, Sankeerth Billakanti
wrote:
>
> The panel-edp driver modes needs to be validated differently from DP
> because the link capabilities are not available for EDP by that time.
>
> Signed-off-by: Sankeerth Billakanti
This should not be necessary after
https://patchwork.
On Wed, 30 Mar 2022 at 19:03, Sankeerth Billakanti
wrote:
>
> The interrupt register will still reflect the connect and disconnect
> interrupt status without generating an actual HW interrupt.
> The controller driver should not handle those masked interrupts.
>
> Signed-off-by: Sankeerth Billakant
As noted by Ville Syrjälä [1] the dp_connector_get_modes() has weird
on-stack interim copy of the mode. When reviewing the mentioned patch I
noticed that the rest of the code in dp_connector_get_modes() is weird,
unused since September of 2020 and can be removed. This series removes
dead weird code
Since dp_panel_get_modes() handling for dp_mode was removed,
dp_display_get_modes also doesn't change the passed dp_mode, drop the
unused dp_mode variable being allocated unused and then freed.
Reviewed-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/
Make dp_connector_mode_valid() return precise MODE_CLOCK_HIGH rather
than generic MODE_BAD in case the mode clock is higher than
DP_MAX_PIXEL_CLK_KHZ (675 MHz).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_drm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Since the last commit, the max_pclk_khz became constant, it's set to
DP_MAX_PIXEL_CLK_KHZ and never changed afterwards. Remove it completely
and use DP_MAX_PIXEL_CLK_KHZ directly.
Reviewed-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_
Since the commit ab205927592b ("drm/msm/dp: remove mode hard-coding in
case of DP CTS") the function dp_panel_get_modes() doesn't use (or fill)
the dp_mode argument. Drop it completely.
Reviewed-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/
On 30/03/2022 19:02, Sankeerth Billakanti wrote:
This patch adds support for generic eDP sink through aux_bus. The eDP/DP
controller driver should support aux transactions originating from the
panel-edp driver and hence should be initialized and ready.
The panel bridge supporting the panel shoul
Hi,
On Wed, Mar 30, 2022 at 4:19 PM Dmitry Baryshkov
wrote:
> > + bridge->ops =
> > + DRM_BRIDGE_OP_DETECT |
> > + DRM_BRIDGE_OP_HPD |
> > + DRM_BRIDGE_OP_MODES;
>
> I think OP_MODES should be used for eDP, shouldn't it?
No.
Hi Dmitry,
> On Wed, 30 Mar 2022 at 19:03, Sankeerth Billakanti
> wrote:
> >
> > The interrupt register will still reflect the connect and disconnect
> > interrupt status without generating an actual HW interrupt.
> > The controller driver should not handle those masked interrupts.
> >
> > Signed
Hi Dmitry,
> On Wed, 30 Mar 2022 at 19:04, Sankeerth Billakanti
> wrote:
> >
> > The panel-edp driver modes needs to be validated differently from DP
> > because the link capabilities are not available for EDP by that time.
> >
> > Signed-off-by: Sankeerth Billakanti
>
> This should not be nece
On 29-03-22, 10:52, Rob Herring wrote:
> On Tue, Mar 29, 2022 at 12:01:52PM +0530, Vinod Koul wrote:
> > On 28-03-22, 13:21, Rob Herring wrote:
> > > On Mon, Mar 28, 2022 at 12:18 PM Krzysztof Kozlowski
> > > wrote:
> > > >
> > > > On 28/03/2022 19:16, Vinod Koul wrote:
> > > > > On 28-03-22, 19:4
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