On Tue, Mar 30, 2021 at 01:22:34PM +0100, Will Deacon wrote:
> > * win_arr contains information of the configured
> > * windows for a domain. This is allocated only
> > * when the number of windows for the domain are
> > * set.
> > */
>
> The last part of this comment is n
On Tue, Mar 30, 2021 at 01:40:09PM +0100, Will Deacon wrote:
> > + ret = pamu_config_ppaace(liodn, geom->aperture_start,
> > +geom->aperture_end - 1, ~(u32)0,
>
> You're passing 'geom->aperture_end - 1' as the size here, but the old code
> seemed to _add_ 1:
>
> > -
On Tue, Mar 30, 2021 at 01:46:51PM +0100, Will Deacon wrote:
> > + ret = pamu_config_ppaace(liodn, geom->aperture_start,
> > +geom->aperture_end - 1, ~(u32)0,
> > +0, dma_domain->snoop_id, dma_domain->stash_id,
> > +
On Tue, Mar 30, 2021 at 01:58:17PM +0100, Will Deacon wrote:
> pamu_config_ppaace() takes quite a few useless parameters at this stage,
> but anyway:
I'll see it it makes sense to throw in another patch at the end to cut
it down a bit more.
> Acked-by: Will Deacon
>
> Do you know if this driver
For now I'll just pass the iommu_domain to iommu_get_dma_strict,
so that we can check for it. We can do additional cleanups on top
of that later.
___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/fr
On 2021-04-01 07:37, Dmitry Baryshkov wrote:
On 01/04/2021 01:47, Rob Clark wrote:
On Wed, Mar 31, 2021 at 9:03 AM Dmitry Baryshkov
wrote:
On 31/03/2021 14:27, Kalyan Thota wrote:
WARN_ON was introduced by the below commit to catch runtime resumes
that are getting triggered before icc path w
On Thu, Apr 01, 2021 at 11:59:45AM +0200, Christoph Hellwig wrote:
> For now I'll just pass the iommu_domain to iommu_get_dma_strict,
> so that we can check for it. We can do additional cleanups on top
> of that later.
Sounds good to me, cheers!
Will
_
On Thu, 1 Apr 2021 at 16:19, wrote:
>
> On 2021-04-01 07:37, Dmitry Baryshkov wrote:
> > On 01/04/2021 01:47, Rob Clark wrote:
> >> On Wed, Mar 31, 2021 at 9:03 AM Dmitry Baryshkov
> >> wrote:
> >>>
> >>> On 31/03/2021 14:27, Kalyan Thota wrote:
> WARN_ON was introduced by the below commit t
On Fri, 26 Mar 2021, Lyude Paul wrote:
> * The @dev field should be set to a pointer to the device that implements
> the
> - * AUX channel.
> + * AUX channel. As well, the @drm_dev field should be set to the &drm_device
> + * that will be using this AUX channel as early as possible. For many
>
Hi,
On Wed, Mar 31, 2021 at 6:23 PM Rob Clark wrote:
>
> From: Rob Clark
>
> Unused since commit c951a9b284b9 ("drm/msm: Remove msm_gem_free_work")
>
> Signed-off-by: Rob Clark
> Tested-by: Douglas Anderson
> ---
> drivers/gpu/drm/msm/msm_gem.h | 2 --
> 1 file changed, 2 deletions(-)
Review
Hi,
On Wed, Mar 31, 2021 at 6:24 PM Rob Clark wrote:
>
> @@ -45,6 +30,9 @@ msm_gem_shrinker_scan(struct shrinker *shrinker, struct
> shrink_control *sc)
> list_for_each_entry(msm_obj, &priv->inactive_dontneed, mm_list) {
> if (freed >= sc->nr_to_scan)
>
Hi,
On Wed, Mar 31, 2021 at 6:24 PM Rob Clark wrote:
>
> From: Rob Clark
>
> In normal cases the gem obj lock is acquired first before mm_lock. The
> exception is iterating the various object lists. In the shrinker path,
> deadlock is avoided by using msm_gem_trylock() and skipping over object
domain_window_disable is wired up by fsl_pamu, but never actually called.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/fsl_pamu_domain.c | 48 -
include/linux/iommu.h | 2 --
2 files changed, 50 deletions(
None of the values returned by this function are ever queried. Also
remove the DOMAIN_ATTR_FSL_PAMUV1 enum value that is not otherwise used.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/fsl_pamu_domain.c | 30 --
includ
The only domains allocated forces use of a single window. Remove all
the code related to multiple window support, as well as the need for
qman_portal to force a single window.
Remove the now unused DOMAIN_ATTR_WINDOWS iommu_attr.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by:
Hi all,
there are a bunch of IOMMU APIs that are entirely unused, or only used as
a private communication channel between the FSL PAMU driver and it's only
consumer, the qbman portal driver.
So this series drops a huge chunk of entirely unused FSL PAMU
functionality, then drops all kinds of unuse
The default geometry is the same as the one set by qman_port given
that FSL_PAMU depends on having 64-bit physical and thus DMA addresses.
Remove the support to update the geometry and remove the now pointless
geom_size field.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li
The only thing that fsl_pamu_window_enable does for the current caller
is to fill in the prot value in the only dma_window structure, and to
propagate a few values from the iommu_domain_geometry struture into the
dma_window. Remove the dma_window entirely, hardcode the prot value and
otherwise use
Keep the functionality to allocate the domain together.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/fsl_pamu_domain.c | 34 ++---
1 file changed, 10 insertions(+), 24 deletions(-)
diff --git a/drivers/iommu/fsl_pamu_do
Add a fsl_pamu_configure_l1_stash API that qman_portal can call directly
instead of indirecting through the iommu attr API.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
arch/powerpc/include/asm/fsl_pamu_stash.h | 12 +++-
drivers/iommu/fsl_pamu_domain.c
Merge the two fuctions that configure the ppaace into a single coherent
function. I somehow doubt we need the two pamu_config_ppaace calls,
but keep the existing behavior just to be on the safe side.
Signed-off-by: Christoph Hellwig
Acked-by: Li Yang
---
drivers/iommu/fsl_pamu_domain.c | 65 ++
No good reason to split this functionality over two functions.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/fsl_pamu_domain.c | 59 +++--
1 file changed, 20 insertions(+), 39 deletions(-)
diff --git a/drivers/iommu/fsl_
Instead of a separate call to enable all devices from the list, just
enable the liodn once the device is attached to the iommu domain.
This also remove the DOMAIN_ATTR_FSL_PAMU_ENABLE iommu_attr.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/fsl_pa
The snoop_id is always set to ~(u32)0.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/fsl_pamu_domain.c | 5 ++---
drivers/iommu/fsl_pamu_domain.h | 1 -
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/fsl_pamu_domain.c b
These are always wired to fixed values, so don't bother passing them as
arguments.
Signed-off-by: Christoph Hellwig
---
drivers/iommu/fsl_pamu.c| 14 +++---
drivers/iommu/fsl_pamu.h| 3 +--
drivers/iommu/fsl_pamu_domain.c | 6 +++---
3 files changed, 7 insertions(+), 16
The win_addr and win_size parameters are always set to 0 and 1 << 36
respectively, so just hard code them.
Signed-off-by: Christoph Hellwig
---
drivers/iommu/fsl_pamu.c| 23 ---
drivers/iommu/fsl_pamu.h| 3 +--
drivers/iommu/fsl_pamu_domain.c | 10 ++
DOMAIN_ATTR_PAGING is never used.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/iommu.c | 5 -
include/linux/iommu.h | 1 -
2 files changed, 6 deletions(-)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index b212bf0261820b..9a4cda3
The geometry information can be trivially queried from the iommu_domain
struture.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/iommu.c | 20 +++-
drivers/vfio/vfio_iommu_type1.c | 26 --
drivers/vho
Use an explicit enable_nesting method instead.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 43 -
drivers/iommu/arm/arm-smmu/arm-smmu.c | 30 +++---
drivers/iommu/intel/iommu.c
Don't obsfucate the trivial bit flag check.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
---
drivers/iommu/iommu.c | 23 +--
1 file changed, 5 insertions(+), 18 deletions(-)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 58d1d11a8d5c10..052cef11a
From: Robin Murphy
Instead make the global iommu_dma_strict paramete in iommu.c canonical by
exporting helpers to get and set it and use those directly in the drivers.
This make sure that the iommu.strict parameter also works for the AMD and
Intel IOMMU drivers on x86. As those default to lazy
Remove the now unused iommu attr infrastructure.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
---
drivers/iommu/iommu.c | 26 --
include/linux/iommu.h | 36
2 files changed, 62 deletions(-)
diff --git a/drivers/iommu/iommu.
Use an explicit set_pgtable_quirks method instead that just passes
the actual quirk bitmask instead.
Signed-off-by: Christoph Hellwig
Acked-by: Will Deacon
Acked-by: Li Yang
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 5 +-
drivers/iommu/arm/arm-smmu/arm-smmu.c | 64 +-
On Thu, Apr 1, 2021 at 8:34 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Mar 31, 2021 at 6:24 PM Rob Clark wrote:
> >
> > @@ -45,6 +30,9 @@ msm_gem_shrinker_scan(struct shrinker *shrinker, struct
> > shrink_control *sc)
> > list_for_each_entry(msm_obj, &priv->inactive_dontneed, mm_list) {
From: Rob Clark
lock_stat + mmm_donut[1] say that this reduces contention on mm_lock
significantly (~350x lower waittime-max, and ~100x lower waittime-avg)
[1]
https://chromium.googlesource.com/chromiumos/platform/microbenchmarks/+/refs/heads/main/mmm_donut.py
Signed-off-by: Rob Clark
---
dr
On Wed, Mar 31, 2021 at 05:02:23PM +0300, Dmitry Baryshkov wrote:
> I suppose the microcode version check for a650 is incorrect. It checks
> for the version 1.95, while the firmware released have major version of 0:
> 0.91 (vulnerable), 0.99 (fixing the issue).
>
> Lower version requirements to ac
On Mon, Feb 22, 2021 at 8:06 AM Rob Clark wrote:
>
> On Mon, Feb 22, 2021 at 7:45 AM Akhil P Oommen wrote:
> >
> > On 2/19/2021 9:30 PM, Rob Clark wrote:
> > > On Fri, Feb 19, 2021 at 2:44 AM Akhil P Oommen
> > > wrote:
> > >>
> > >> On 2/18/2021 9:41 PM, Rob Clark wrote:
> > >>> On Thu, Feb 18
Hello linux-firmware maintainers,
Could you please pull updated firmware for Qualcomm SM8250-based
platforms. Firmware successfully tested on Qualcomm Robotics RB5 platform.
The following changes since commit 3f026a2f13a8f130cde849168a111ec80f12e27b:
rtl_bt: Update RTL8822C BT(UART I/F) FW
On Thu, 1 Apr 2021 at 23:09, Rob Clark wrote:
>
> On Mon, Feb 22, 2021 at 8:06 AM Rob Clark wrote:
> >
> > On Mon, Feb 22, 2021 at 7:45 AM Akhil P Oommen
> > wrote:
> > >
> > > On 2/19/2021 9:30 PM, Rob Clark wrote:
> > > > On Fri, Feb 19, 2021 at 2:44 AM Akhil P Oommen
> > > > wrote:
> > > >
On Thu, Apr 1, 2021 at 2:03 PM Dmitry Baryshkov
wrote:
>
> On Thu, 1 Apr 2021 at 23:09, Rob Clark wrote:
> >
> > On Mon, Feb 22, 2021 at 8:06 AM Rob Clark wrote:
> > >
> > > On Mon, Feb 22, 2021 at 7:45 AM Akhil P Oommen
> > > wrote:
> > > >
> > > > On 2/19/2021 9:30 PM, Rob Clark wrote:
> > >
40 matches
Mail list logo
