On Tue, Jan 28, 2025 at 7:34 PM Connor Abbott wrote:
>
> On Tue, Jan 28, 2025 at 10:25 PM Rob Clark wrote:
> >
> > On Tue, Jan 28, 2025 at 6:31 PM Connor Abbott wrote:
> > >
> > > On Tue, Jan 28, 2025 at 9:21 PM Rob Clark wrote:
> > > >
> > > > On Tue, Jan 28, 2025 at 2:15 PM Connor Abbott
>
On Tue, Jan 28, 2025 at 10:25 PM Rob Clark wrote:
>
> On Tue, Jan 28, 2025 at 6:31 PM Connor Abbott wrote:
> >
> > On Tue, Jan 28, 2025 at 9:21 PM Rob Clark wrote:
> > >
> > > On Tue, Jan 28, 2025 at 2:15 PM Connor Abbott wrote:
> > > >
> > > > On Tue, Jan 28, 2025 at 5:10 PM Rob Clark wrote:
On Tue, Jan 28, 2025 at 6:31 PM Connor Abbott wrote:
>
> On Tue, Jan 28, 2025 at 9:21 PM Rob Clark wrote:
> >
> > On Tue, Jan 28, 2025 at 2:15 PM Connor Abbott wrote:
> > >
> > > On Tue, Jan 28, 2025 at 5:10 PM Rob Clark wrote:
> > > >
> > > > On Tue, Jan 28, 2025 at 3:08 AM Prakash Gupta
> >
On Tue, Jan 28, 2025 at 9:21 PM Rob Clark wrote:
>
> On Tue, Jan 28, 2025 at 2:15 PM Connor Abbott wrote:
> >
> > On Tue, Jan 28, 2025 at 5:10 PM Rob Clark wrote:
> > >
> > > On Tue, Jan 28, 2025 at 3:08 AM Prakash Gupta
> > > wrote:
> > > >
> > > > On Thu, Jan 23, 2025 at 03:14:16PM -0500, Co
On Tue, Jan 28, 2025 at 2:15 PM Connor Abbott wrote:
>
> On Tue, Jan 28, 2025 at 5:10 PM Rob Clark wrote:
> >
> > On Tue, Jan 28, 2025 at 3:08 AM Prakash Gupta
> > wrote:
> > >
> > > On Thu, Jan 23, 2025 at 03:14:16PM -0500, Connor Abbott wrote:
> > > > On Thu, Jan 23, 2025 at 2:26 PM Prakash G
On Tue, Jan 28, 2025 at 5:10 PM Rob Clark wrote:
>
> On Tue, Jan 28, 2025 at 3:08 AM Prakash Gupta wrote:
> >
> > On Thu, Jan 23, 2025 at 03:14:16PM -0500, Connor Abbott wrote:
> > > On Thu, Jan 23, 2025 at 2:26 PM Prakash Gupta
> > > wrote:
> > > >
> > > > On Thu, Jan 23, 2025 at 09:00:17AM -0
On Tue, Jan 28, 2025 at 3:08 AM Prakash Gupta wrote:
>
> On Thu, Jan 23, 2025 at 03:14:16PM -0500, Connor Abbott wrote:
> > On Thu, Jan 23, 2025 at 2:26 PM Prakash Gupta
> > wrote:
> > >
> > > On Thu, Jan 23, 2025 at 09:00:17AM -0500, Connor Abbott wrote:
> > > > On Thu, Jan 23, 2025 at 6:10 AM
On Thu, Jan 23, 2025 at 03:14:16PM -0500, Connor Abbott wrote:
> On Thu, Jan 23, 2025 at 2:26 PM Prakash Gupta wrote:
> >
> > On Thu, Jan 23, 2025 at 09:00:17AM -0500, Connor Abbott wrote:
> > > On Thu, Jan 23, 2025 at 6:10 AM Prakash Gupta
> > > wrote:
> > > >
> > > > On Wed, Jan 22, 2025 at 03
On Thu, Jan 23, 2025 at 2:26 PM Prakash Gupta wrote:
>
> On Thu, Jan 23, 2025 at 09:00:17AM -0500, Connor Abbott wrote:
> > On Thu, Jan 23, 2025 at 6:10 AM Prakash Gupta
> > wrote:
> > >
> > > On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
> > >
> > > > + /*
> > > > + *
On Thu, Jan 23, 2025 at 2:26 PM Prakash Gupta wrote:
>
> On Thu, Jan 23, 2025 at 09:00:17AM -0500, Connor Abbott wrote:
> > On Thu, Jan 23, 2025 at 6:10 AM Prakash Gupta
> > wrote:
> > >
> > > On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
> > >
> > > > + /*
> > > > + *
On Thu, Jan 23, 2025 at 09:00:17AM -0500, Connor Abbott wrote:
> On Thu, Jan 23, 2025 at 6:10 AM Prakash Gupta wrote:
> >
> > On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
> >
> > > + /*
> > > + * On some implementations FSR.SS asserts a context fault
> > > + * inter
On Thu, Jan 23, 2025 at 12:35 PM Prakash Gupta wrote:
>
> On Thu, Jan 23, 2025 at 11:51:27AM +, Robin Murphy wrote:
> > On 2025-01-23 11:10 am, Prakash Gupta wrote:
> > > On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
> > > > + /*
> > > > + * The SMMUv2 architecture specificat
On Thu, Jan 23, 2025 at 11:51:27AM +, Robin Murphy wrote:
> On 2025-01-23 11:10 am, Prakash Gupta wrote:
> > On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
> > > + /*
> > > + * The SMMUv2 architecture specification says that if stall-on-fault is
> > > + * enabled the correct s
On Thu, Jan 23, 2025 at 6:10 AM Prakash Gupta wrote:
>
> On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
>
> > @@ -125,12 +125,25 @@ static void qcom_adreno_smmu_resume_translation(const
> > void *cookie, bool termina
> > struct arm_smmu_domain *smmu_domain = (void *)cookie;
On 2025-01-23 11:10 am, Prakash Gupta wrote:
On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
@@ -125,12 +125,25 @@ static void qcom_adreno_smmu_resume_translation(const
void *cookie, bool termina
struct arm_smmu_domain *smmu_domain = (void *)cookie;
struct arm_
On Wed, Jan 22, 2025 at 03:00:58PM -0500, Connor Abbott wrote:
> @@ -125,12 +125,25 @@ static void qcom_adreno_smmu_resume_translation(const
> void *cookie, bool termina
> struct arm_smmu_domain *smmu_domain = (void *)cookie;
> struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
> st
On some SMMUv2 implementations, including MMU-500, SMMU_CBn_FSR.SS
asserts an interrupt. The only way to clear that bit is to resume the
transaction by writing SMMU_CBn_RESUME, but typically resuming the
transaction requires complex operations (copying in pages, etc.) that
can't be done in IRQ cont
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