Re: [Freedreno] [PATCH v2 2/7] drm/msm/dpu: don't clear IRQ register twice

2021-08-17 Thread abhinavk
On 2021-06-17 15:20, Dmitry Baryshkov wrote: We already clear the IRQ status register before processing IRQs, so do not clear the register again. Especially do not clear the IRQ status _after_ processing the IRQ as this way we can loose the event. Signed-off-by: Dmitry Baryshkov Reviewed-by: A

[Freedreno] [PATCH v2 2/7] drm/msm/dpu: don't clear IRQ register twice

2021-06-17 Thread Dmitry Baryshkov
We already clear the IRQ status register before processing IRQs, so do not clear the register again. Especially do not clear the IRQ status _after_ processing the IRQ as this way we can loose the event. Signed-off-by: Dmitry Baryshkov --- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 17