Re: [Freedreno] [PATCH v1 3/3] drm/msm/dpu: simplify interrupt managing

2021-05-16 Thread Dmitry Baryshkov
On 16/05/2021 08:24, Bjorn Andersson wrote: On Sun 11 Apr 19:09 CDT 2021, Dmitry Baryshkov wrote: Change huge lookup table to contain just sensible entries. IRQ index is now not an index in the table, but just register id (multiplied by 32, the amount of IRQs in the register) plus offset in the

Re: [Freedreno] [PATCH v1 3/3] drm/msm/dpu: simplify interrupt managing

2021-05-16 Thread Dmitry Baryshkov
On Sun, 16 May 2021 at 08:24, Bjorn Andersson wrote: > > On Sun 11 Apr 19:09 CDT 2021, Dmitry Baryshkov wrote: > > > Change huge lookup table to contain just sensible entries. IRQ index is > > now not an index in the table, but just register id (multiplied by 32, > > the amount of IRQs in the regi

Re: [Freedreno] [PATCH v1 3/3] drm/msm/dpu: simplify interrupt managing

2021-05-15 Thread Bjorn Andersson
On Sun 11 Apr 19:09 CDT 2021, Dmitry Baryshkov wrote: > Change huge lookup table to contain just sensible entries. IRQ index is > now not an index in the table, but just register id (multiplied by 32, > the amount of IRQs in the register) plus offset in the register. This > allows us to remove all

[Freedreno] [PATCH v1 3/3] drm/msm/dpu: simplify interrupt managing

2021-04-11 Thread Dmitry Baryshkov
Change huge lookup table to contain just sensible entries. IRQ index is now not an index in the table, but just register id (multiplied by 32, the amount of IRQs in the register) plus offset in the register. This allows us to remove all the "reserved" entries from dpu_irq_map. The table is now only