round this issue we keep track of last submit sequence number
for each ring and compare it with one written to memptrs from GPU during
execution of CACHE_FLUSH_TS event.
Fixes: b1fc2839d2f9 ("drm/msm: Implement preemption for A5XX targets")
Signed-off-by: Vladimir Lypak
---
drivers/gpu
A5XX targets")
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 1 +
drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 24 +--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
b/drivers/gp
e use suspend
and resume to do so (keeping values of those fields again).
Fixes: b1fc2839d2f9 ("drm/msm: Implement preemption for A5XX targets")
Signed-off-by: Vladimir Lypak
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 2 ++
1 file changed, 2 inserti
: a7a4c19c36de ("drm/msm/a5xx: fix setting of the CP_PREEMPT_ENABLE_LOCAL
register")
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
b/drivers/g
- Added Reviewed-by on patch 2
---
Vladimir Lypak (4):
drm/msm/a5xx: disable preemption in submits by default
drm/msm/a5xx: properly clear preemption records on resume
drm/msm/a5xx: fix races in preemption evaluation stage
drm/msm/a5xx: workaround early ring-buffer emptiness check
drivers
On Thu, Aug 01, 2024 at 06:46:10PM +0530, Akhil P Oommen wrote:
> On Thu, Jul 11, 2024 at 10:00:19AM +0000, Vladimir Lypak wrote:
> > Two fields of preempt_record which are used by CP aren't reset on
> > resume: "data" and "info". This is the reason behin
On Thu, Aug 01, 2024 at 01:52:32PM +0100, Connor Abbott wrote:
> On Thu, Aug 1, 2024 at 1:25 PM Vladimir Lypak
> wrote:
> >
> > On Mon, Jul 29, 2024 at 06:26:45PM +0100, Connor Abbott wrote:
> > > On Thu, Jul 11, 2024 at 11:10 AM Vladimir Lypak
> > > wrot
On Mon, Jul 29, 2024 at 06:26:45PM +0100, Connor Abbott wrote:
> On Thu, Jul 11, 2024 at 11:10 AM Vladimir Lypak
> wrote:
> >
> > On A5XX GPUs when preemption is used it's invietable to enter a soft
> > lock-up state in which GPU is stuck at empty ring-buffer doing
On Wed, Jul 17, 2024 at 10:40:26AM +0100, Connor Abbott wrote:
> On Thu, Jul 11, 2024 at 11:10 AM Vladimir Lypak
> wrote:
> >
> > There are several issues with preemption on Adreno A5XX GPUs which
> > render system unusable if more than one priority level is used.
round this issue we keep track of last submit sequence number
for each ring and compare it with one written to memptrs from GPU during
execution of CACHE_FLUSH_TS event.
Fixes: b1fc2839d2f9 ("drm/msm: Implement preemption for A5XX targets")
Signed-off-by: Vladimir Lypak
---
drivers/gpu
d that updated some
ring with new submit sees this state it should wait until it passes.
Fixes: b1fc2839d2f9 ("drm/msm: Implement preemption for A5XX targets")
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 6 +++---
drivers/gpu/drm/msm/adreno/a5xx_gpu.h |
e use suspend
and resume to do so (keeping values of those fields again).
Fixes: b1fc2839d2f9 ("drm/msm: Implement preemption for A5XX targets")
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/
: a7a4c19c36de ("drm/msm/a5xx: fix setting of the CP_PREEMPT_ENABLE_LOCAL
register")
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
b/drivers/g
There are several issues with preemption on Adreno A5XX GPUs which
render system unusable if more than one priority level is used. Those
issues include persistent GPU faults and hangs, full UI lockups with
idling GPU.
---
Vladimir Lypak (4):
drm/msm/a5xx: disable preemption in submits by
es on those GPUs. As for preventing accesses to the region
from protected mode it was tested to work the same.
This patch drops the "if" condition in setup of CP_PROTECT entry because
it already includes all supported revisions except A540.
Signed-off-by: Vladimir Lypak
---
drivers/gpu
This GPU is found on SoCs such as MSM8953 (650 MHz), SDM450 (600 MHz),
SDM632 (725 MHz).
Signed-off-by: Vladimir Lypak
---
Changes since v1:
- don't change behaviour for other GPU revisions
- also setup CP_PROTECT for SMMU
- correct formatting
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
On Fri, Dec 03, 2021 at 09:51:10PM +0300, Dmitry Baryshkov wrote:
> On 22/10/2021 20:33, Bjorn Andersson wrote:
> > On Fri 22 Oct 04:43 PDT 2021, Vladimir Lypak wrote:
> >
> > > This GPU is found on SoCs such as MSM8953(650MHz), SDM450(600MHz),
> > > SDM632(72
On Fri, Oct 22, 2021 at 10:33:29AM -0700, Bjorn Andersson wrote:
> On Fri 22 Oct 04:43 PDT 2021, Vladimir Lypak wrote:
>
> > This GPU is found on SoCs such as MSM8953(650MHz), SDM450(600MHz),
> > SDM632(725MHz).
> >
> > Signed-off-by: Vladimir Lypak
> >
This GPU is found on SoCs such as MSM8953(650MHz), SDM450(600MHz),
SDM632(725MHz).
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 34 ++
drivers/gpu/drm/msm/adreno/adreno_device.c | 18
drivers/gpu/drm/msm/adreno/adreno_gpu.h
forgotten to get its branch (that would set up protected region of
0x4000 dwords).
Fixes: b5f103ab98c7 ("drm/msm: gpu: Add A5XX target support")
Signed-off-by: Vladimir Lypak
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
di
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