On Sun, Feb 09, 2025 at 10:42:52PM +0100, Marijn Suijten wrote:
> When configuring the timing of DSI hosts (interfaces) in
> dsi_timing_setup() all values written to registers are taking
> bonded-mode into account by dividing the original mode width by 2
> (half the data is sent over each of the tw
On Tue, Feb 11, 2025 at 12:19:32AM +0100, Marijn Suijten wrote:
> What used to be the input_10_bits boolean - feeding into the lowest
> bit of DSC_ENC - on MSM downstream turned into an accidental OR with
> the full bits_per_component number when it was ported to the upstream
> kernel.
>
> On typi
On 11.02.2025 12:19 AM, Marijn Suijten wrote:
> What used to be the input_10_bits boolean - feeding into the lowest
> bit of DSC_ENC - on MSM downstream turned into an accidental OR with
> the full bits_per_component number when it was ported to the upstream
> kernel.
>
> On typical bpc=8 setups w
On 2/9/2025 1:42 PM, Marijn Suijten wrote:
When configuring the timing of DSI hosts (interfaces) in
dsi_timing_setup() all values written to registers are taking
bonded-mode into account by dividing the original mode width by 2
(half the data is sent over each of the two DSI hosts), but the fu
On 2/9/2025 1:42 PM, Marijn Suijten wrote:
When DSC is enabled the number of interfaces is forced to be 1, and
documented that it is a "power-optimal" layout to use two DSC encoders
together with two Layer Mixers. However, the same layout (two DSC
hard-slice encoders with two LMs) is also use
On 2/3/2025 9:29 AM, Krzysztof Kozlowski wrote:
PHY_CMN_CLK_CFG0 register is updated by the PHY driver and by two
divider clocks from Common Clock Framework:
devm_clk_hw_register_divider_parent_hw(). Concurrent access by the
clocks side is protected with spinlock, however driver's side in
res
On 2/10/2025 3:19 PM, Marijn Suijten wrote:
What used to be the input_10_bits boolean - feeding into the lowest
bit of DSC_ENC - on MSM downstream turned into an accidental OR with
the full bits_per_component number when it was ported to the upstream
kernel.
On typical bpc=8 setups we don't n
On 2025-02-10 18:13:58, Konrad Dybcio wrote:
> On 10.02.2025 6:10 PM, Konrad Dybcio wrote:
> > On 8.02.2025 11:09 PM, Marijn Suijten wrote:
> >> On 2025-02-03 21:14:26, Danila Tikhonov wrote:
...
> >>> dsc->simple_422 = 0;
> >>> dsc->convert_rgb = 1;
> >>> dsc->vbr_enable = 0;
> >>
> >> This
What used to be the input_10_bits boolean - feeding into the lowest
bit of DSC_ENC - on MSM downstream turned into an accidental OR with
the full bits_per_component number when it was ported to the upstream
kernel.
On typical bpc=8 setups we don't notice this because line_buf_depth is
always an od
On 2/7/2025 4:27 PM, Dmitry Baryshkov wrote:
In order to simplify the driver even further and to remove the
boilerplate code, rewrite the audio interface to use the DRM HDMI Audio
framework.
Audio InfoFames are controlled centrally via the DRM HDMI framework.
Correct InfoFrame data is program
On 2/9/2025 7:51 PM, Ethan Carter Edwards wrote:
There is a possibility for an uninitialized *ret* variable to be
returned in some code paths.
Fix this by initializing *ret* to 0.
Addresses-Coverity-ID: 1642546 ("Uninitialized scalar variable")
Fixes: 774bcfb731765d ("drm/msm/dpu: add suppor
On 2/10/2025 6:24 AM, Dmitry Baryshkov wrote:
On Mon, Feb 10, 2025 at 01:54:29PM +0100, Marijn Suijten wrote:
On 2025-02-10 01:11:59, Dmitry Baryshkov wrote:
On Sun, Feb 09, 2025 at 10:42:53PM +0100, Marijn Suijten wrote:
Ordering issues here cause an uninitialized (default STANDALONE)
usec
On 9.02.2025 6:05 AM, Dmitry Baryshkov wrote:
> There is no need to specify separate HPD gpio for the HDMI block. Use
> built-in HPD in order to detect if the monitor is plugged or not.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
On 10.02.2025 6:10 PM, Konrad Dybcio wrote:
> On 8.02.2025 11:09 PM, Marijn Suijten wrote:
>> On 2025-02-03 21:14:26, Danila Tikhonov wrote:
>>> From: Eugene Lepshy
>>>
>>> DRM DSC helper has parameters for various bpc values other than 8:
>>
>> Weird zero-width \u200b spaces here between "value
On 8.02.2025 11:09 PM, Marijn Suijten wrote:
> On 2025-02-03 21:14:26, Danila Tikhonov wrote:
>> From: Eugene Lepshy
>>
>> DRM DSC helper has parameters for various bpc values other than 8:
>
> Weird zero-width \u200b spaces here between "values" and "other", please
> delete
> those.
>
>> (8/
On 10.02.2025 10:32 AM, Neil Armstrong wrote:
> The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
> add the missing cpu-cfg path to fix the dtbs check error.
>
> Fixes: 9fa33cbca3d2 ("arm64: dts: qcom: sm8650: correct MDSS interconnects")
> Signed-off-by: Neil Armstrong
> ---
On 10.02.2025 10:32 AM, Neil Armstrong wrote:
> The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
> add the missing cpu-cfg path to fix the dtbs check error.
>
> Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects")
> Signed-off-by: Neil Armstrong
> ---
On Mon, Feb 10, 2025 at 01:54:29PM +0100, Marijn Suijten wrote:
> On 2025-02-10 01:11:59, Dmitry Baryshkov wrote:
> > On Sun, Feb 09, 2025 at 10:42:53PM +0100, Marijn Suijten wrote:
> > > Ordering issues here cause an uninitialized (default STANDALONE)
> > > usecase to be programmed (which appears
On 25/02/10 05:41AM, Dmitry Baryshkov wrote:
> On Sun, Feb 09, 2025 at 10:32:33PM -0500, Ethan Carter Edwards wrote:
> > There is a possibility for an uninitialized *ret* variable to be
> > returned in some code paths.
> >
> > Fix this by initializing *ret* to 0.
> >
> > Addresses-Coverity-ID: 16
There is a possibility for an uninitialized *ret* variable to be
returned in some code paths.
Fix this by initializing *ret* to 0.
Addresses-Coverity-ID: 1642546 ("Uninitialized scalar variable")
Fixes: 774bcfb731765d ("drm/msm/dpu: add support for virtual planes")
Signed-off-by: Ethan Carter Edw
There is a possibility for an uninitialized *ret* variable to be
returned in some code paths.
Fix this by initializing *ret* to 0.
Addresses-Coverity-ID: 1642546 ("Uninitialized scalar variable")
Fixes: 774bcfb731765d ("drm/msm/dpu: add support for virtual planes")
Signed-off-by: Ethan Carter Edw
On 2025-02-10 01:11:59, Dmitry Baryshkov wrote:
> On Sun, Feb 09, 2025 at 10:42:53PM +0100, Marijn Suijten wrote:
> > Ordering issues here cause an uninitialized (default STANDALONE)
> > usecase to be programmed (which appears to be a MUX) in some cases
> > when msm_dsi_host_register() is called, l
Hi Philipp,
On 07/02/25 08:02, Philipp Stanner wrote:
drm_sched_init() has a great many parameters and upcoming new
functionality for the scheduler might add even more. Generally, the
great number of parameters reduces readability and has already caused
one missnaming in:
commit 6f1cacf4eba7 ("
The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
add the missing cpu-cfg path to fix the dtbs check error.
Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects")
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++--
1 file ch
The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
add the missing cpu-cfg path to fix the dtbs check error.
Fixes: 9fa33cbca3d2 ("arm64: dts: qcom: sm8650: correct MDSS interconnects")
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 7 +--
1 file
The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=2
makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg
is required, so explicitly document the mdp0-mem/cpu-cfg interconnect
paths and complete the example with the missing interconnect paths.
Suggested-by: Dmit
The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=2
makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg is
required, so explicitly document the mdp0-mem/cpu-cfg interconnect and
add the cpu-cfg path in the example.
Suggested-by: Dmitry Baryshkov
Signed-off-by
The mdp1-mem is not supported on the SM8550 & SM8650 SoCs, so properly document
the mdp0-mem and cpu-cfg interconnect entries.
This fixes the following errors:
display-subsystem@ae0: interconnects: [[200, 3, 7, 32, 1, 7]] is too short
from schema $id:
http://devicetree.org/schemas/dis
28 matches
Mail list logo
