On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_ACTIVE_CFG feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 8 ++--
driv
Hi Abhinav,
On Wed, 22 Jan 2025 at 02:28, Abhinav Kumar wrote:
>
>
>
> On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
> > Stop declaring DPU_DSPP_PCC as a part of the DSPP features, use the
> > presence of the PCC sblk to check whether PCC is present in the hardware
> > or not.
> >
> > Signed-off
On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_HAS_LAYER_EXT4 feature bit with the core_major_ver >= 9 check.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 12 ++---
On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
Stop declaring DPU_DSPP_PCC as a part of the DSPP features, use the
presence of the PCC sblk to check whether PCC is present in the hardware
or not.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h |
On Tue, Jan 21, 2025 at 4:08 PM Jason Gunthorpe wrote:
>
> On Mon, Jan 20, 2025 at 10:46:47AM -0500, Connor Abbott wrote:
>
> > To work around these problem, disable stall-on-fault as soon as we get a
> > page fault until a cooldown period after pagefaults stop. This allows
> > the GMU some guaran
Hi Marijn,
On Tue Jan 21, 2025 at 12:06 AM CET, Marijn Suijten wrote:
> Some SoCs such as SC7280 (used in the FairPhone 5) have only a single
> DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology
> (2 LM and 2 DSC for a single interface) make it impossible to use
> Display Strea
On Tue, Jan 21, 2025 at 12:10:25PM +0100, Geert Uytterhoeven wrote:
> Hi Dmitry,
>
> CC sfr
>
> On Tue, Jan 21, 2025 at 11:44 AM Dmitry Baryshkov
> wrote:
> > On Tue, 21 Jan 2025 at 11:13, Geert Uytterhoeven
> > wrote:
> > > On Tue, Jan 7, 2025 at 12:31 PM Dmitry Baryshkov
> > > wrote:
> > >
Hi Dmitry,
CC sfr
On Tue, Jan 21, 2025 at 11:44 AM Dmitry Baryshkov
wrote:
> On Tue, 21 Jan 2025 at 11:13, Geert Uytterhoeven wrote:
> > On Tue, Jan 7, 2025 at 12:31 PM Dmitry Baryshkov
> > wrote:
> > > On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote:
> > > > While working on the ge
On Tue, 21 Jan 2025 at 11:13, Geert Uytterhoeven wrote:
>
> Hi Dmitry,
>
> On Tue, Jan 7, 2025 at 12:31 PM Dmitry Baryshkov
> wrote:
> > On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote:
> > > While working on the generic mode_valid() implementation for the HDMI
> > > Connector framewor
On Tue, Jan 21, 2025 at 12:06:15AM +0100, Marijn Suijten wrote:
> Some SoCs such as SC7280 (used in the FairPhone 5) have only a single
> DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology
> (2 LM and 2 DSC for a single interface) make it impossible to use
> Display Stream Compr
Hi Dmitry,
On Tue, Jan 7, 2025 at 12:31 PM Dmitry Baryshkov
wrote:
> On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote:
> > While working on the generic mode_valid() implementation for the HDMI
> > Connector framework I noticed that unlike other DRM objects
> > drm_connector accepts non-
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