Marijn Suijten 于2025年1月20日周一 04:58写道：
>
> On 2025-01-17 15:32:44, Jun Nie wrote:
> > Dmitry Baryshkov 于2025年1月16日周四 16:32写道：
> > >
> > > On Thu, Jan 16, 2025 at 03:26:05PM +0800, Jun Nie wrote:
> > > > Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
> > > > enabled.
> > >
>
Marijn Suijten 于2025年1月20日周一 05:15写道：
>
> On 2025-01-18 00:00:51, Jun Nie wrote:
> > There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
> > interface to 3rd PP instead of the 2nd PP.
>
> Can you explain why this patch uses the number of LMs, instead of dividing the
> number of PPs div
Some SoCs such as SC7280 (used in the FairPhone 5) have only a single
DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology
(2 LM and 2 DSC for a single interface) make it impossible to use
Display Stream Compression panels with mainline, which is exactly what's
installed on the Fa
When things go wrong, the GPU is capable of quickly generating millions
of faulting translation requests per second. When that happens, in the
stall-on-fault model each access will stall until it wins the race to
signal the fault and then the RESUME register is written. This slows
processing page f
On some SMMUv2 implementations, including MMU-500, SMMU_CBn_FSR.SS
asserts an interrupt. The only way to clear that bit is to resume the
transaction by writing SMMU_CBn_RESUME, but typically resuming the
transaction requires complex operations (copying in pages, etc.) that
can't be done in IRQ cont
Up until now we have only called the set_stall callback during
initialization when the device is off. But we will soon start calling it
to temporarily disable stall-on-fault when the device is on, so handle
that by checking if the device is on and writing SCTLR.
Signed-off-by: Connor Abbott
---
drm/msm uses the stall-on-fault model to record the GPU state on the
first GPU page fault to help debugging. On systems where the GPU is
paired with a MMU-500, there were two problems:
1. The MMU-500 doesn't de-assert its interrupt line until the fault is
resumed, which led to a storm of interr
On 2025-01-18 00:00:51, Jun Nie wrote:
> There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
> interface to 3rd PP instead of the 2nd PP.
Can you explain why this patch uses the number of LMs, instead of dividing the
number of PPs divided by the number of physical encoders? This detai
On 2025-01-17 15:32:44, Jun Nie wrote:
> Dmitry Baryshkov 于2025年1月16日周四 16:32写道：
> >
> > On Thu, Jan 16, 2025 at 03:26:05PM +0800, Jun Nie wrote:
> > > Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
> > > enabled.
> >
> > Why? What is the issue that you are solving?
>
>
Hi
Am 20.01.25 um 09:51 schrieb Tomi Valkeinen:
Hi,
On 20/01/2025 09:49, Thomas Zimmermann wrote:
Hi
Am 16.01.25 um 11:03 schrieb Tomi Valkeinen:
[...]
Aligning video= and dumb buffers almost sounds like going backwards.
video= parameter is bad,
Who told you that? Video= is still the way
Hi,
On 20/01/2025 09:49, Thomas Zimmermann wrote:
Hi
Am 16.01.25 um 11:03 schrieb Tomi Valkeinen:
[...]
Aligning video= and dumb buffers almost sounds like going backwards.
video= parameter is bad,
Who told you that? Video= is still the way to specify an initial display
mode to the kernel
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