[PATCH] drm/msm/hdmi: mark interlace_allowed as true

The MSM HDMI driver supports interlaced modes. Set the corresponding flag to allow interlaced modes on the corresponding connectors. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge

[PATCH 5/6] drm/msm/dp: migrate the ycbcr_420_allowed to drm_bridge

Instead of forcing the ycbcr_420_allowed flag to be set on the created drm_connector, set it on the drm_bridge instance and allow drm_bridge_connecgtor to propagate it to the drm_connector. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 4 ++-- drivers/gpu/drm/msm/dp/

[PATCH 3/6] drm/bridge: display-connector: allow YCbCr 420 for HDMI and DP

Allow YCbCr 420 output for HDMI and DisplayPort connectors. Other bridges in the chain still might limit YCbCr 420 support on the corresponding connector. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/bridge/display-connector.c | 4 1 file changed, 4 insertions(+) diff --git a/driver

[PATCH 4/6] drm/bridge: aux: allow interlaced and YCbCr 420 output

As both aux bridges are merely passthrough bridges, mark them as supporting interlaced and YCbCr 420 data. Other bridges in the chain still might limit interlaced and YCbCr 420 data support on the corresponding connector. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/bridge/aux-bridge.c

[PATCH 6/6] drm/bridge: dw-hdmi: set bridge's ycbcr_420_allowed flag

Set the drm_bridge's ycbcr_420_allowed flag if the YCbCr 420 output is supported by the hardware. Cc: Alexander Stein Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b

[PATCH 0/6] drm/bridge: add ycbcr_420_allowed support

sertions(+), 13 deletions(-) --- base-commit: 7f796de9da37b78e05edde94ebc7e3f9ee53b3b4 change-id: 20241018-bridge-yuv420-aab94d4575de Best regards, -- Dmitry Baryshkov

[PATCH 2/6] drm/atomic: add interlaced and ycbcr_420 flags to connector's state dump

Although the interlace_allowed and ycbcr_420_allowed flags are a part of the struct drm_connector rather than struct drm_connector_state, still include them into state dump in order to ease debugging of the setup issues. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_atomic.c | 2 ++ 1

[PATCH 1/6] drm/display: bridge_connector: handle ycbcr_420_allowed

Follow the interlace_allowed example and calculate drm_connector's ycbcr_420_allowed flag as AND of all drm_bridge's ycbcr_420_allowed flags in a chain. This is one of the gaps between several bridge-specific connector implementations and drm_bridge_connector. Signed-off-by: Dmitry Baryshkov ---

Re: [PATCH 2/4] drm/msm/mdss: use register definitions instead of hand-coding them

On 9/21/2024 1:17 AM, Dmitry Baryshkov wrote: Move existing register definitions to mdss.xml and use generated defines for registers access instead of hand-coding everything in the source file. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 35

Re: [PATCH 1/4] drm/msm: move MDSS registers to separate header file

On 9/21/2024 1:17 AM, Dmitry Baryshkov wrote: In preparation of adding more registers, move MDSS-related headers to the separate top-level file. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/registers/display/mdp5.xml | 16 -

[PATCH] drm: a6xx: avoid excessive stack usage

From: Arnd Bergmann Clang-19 and above sometimes end up with multiple copies of the large a6xx_hfi_msg_bw_table structure on the stack. The problem is that a6xx_hfi_send_bw_table() calls a number of device specific functions to fill the structure, but these create another copy of the structure on

Re: [PATCH] drm/msm/gpu: Check the status of registration to PM QoS

On 10/18/24 13:02, Dmitry Baryshkov wrote: On Fri, Oct 18, 2024 at 12:18:11PM +0100, Lukasz Luba wrote: There is a need to check the returned value of the registration function. Why? The question can be: why this driver doesn't check errors from frameworks during the registration? Is it

Re: [PATCH] drm/msm/gpu: Check the status of registration to PM QoS

On Fri, Oct 18, 2024 at 12:18:11PM +0100, Lukasz Luba wrote: > There is a need to check the returned value of the registration function. Why? > In case of returned error, print that and stop the init process. > > Fixes: 7c0ffcd40b16 ("drm/msm/gpu: Respect PM QoS constraints") > Signed-off-by: Lu

[PATCH] drm/msm/gpu: Check the status of registration to PM QoS

There is a need to check the returned value of the registration function. In case of returned error, print that and stop the init process. Fixes: 7c0ffcd40b16 ("drm/msm/gpu: Respect PM QoS constraints") Signed-off-by: Lukasz Luba --- drivers/gpu/drm/msm/msm_gpu_devfreq.c | 9 +++-- 1 file ch

Re: [PATCH v4 1/5] dt-bindings: display/msm: Document MDSS on SA8775P

On Wed, Oct 09, 2024 at 08:02:01PM +0530, Mahadevan wrote: > Document the MDSS hardware found on the Qualcomm SA8775P platform. > > Reviewed-by: Krzysztof Kozlowski > Signed-off-by: Mahadevan > --- > .../bindings/display/msm/qcom,sa8775p-mdss.yaml| 241 > + > 1 file cha

Re: [PATCH v5 0/5] Add support for DisplayPort on SA8775P platform

On 18.10.2024 12:08 PM, Dmitry Baryshkov wrote: > On Fri, Oct 18, 2024 at 12:37:01PM +0530, Soutrik Mukhopadhyay wrote: >> This series adds support for the DisplayPort controller >> and eDP PHY v5 found on the Qualcomm SA8775P platform. >> >> --- >> v2: Fixed review comments from Dmitry and Bjorn >

Re: [PATCH v5 0/5] Add support for DisplayPort on SA8775P platform

On Fri, Oct 18, 2024 at 12:37:01PM +0530, Soutrik Mukhopadhyay wrote: > This series adds support for the DisplayPort controller > and eDP PHY v5 found on the Qualcomm SA8775P platform. > > --- > v2: Fixed review comments from Dmitry and Bjorn > - Made aux_cfg array as const. > - Reused

[PATCH v5 4/5] dt-bindings: display: msm: dp-controller: document SA8775P compatible

Add compatible string for the DisplayPort controller found on the Qualcomm SA8775P platform. Acked-by: Krzysztof Kozlowski Signed-off-by: Soutrik Mukhopadhyay --- v2: No change v3: No change v4: No change v5: No change --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1

[PATCH v5 0/5] Add support for DisplayPort on SA8775P platform

This series adds support for the DisplayPort controller and eDP PHY v5 found on the Qualcomm SA8775P platform. --- v2: Fixed review comments from Dmitry and Bjorn - Made aux_cfg array as const. - Reused edp_swing_hbr_rbr and edp_swing_hbr2_hbr3 for v5. v3: Fixed review comments fr

[PATCH v5 3/5] phy: qcom: edp: Add support for eDP PHY on SA8775P

Add support for eDP PHY v5 found on the Qualcomm SA8775P platform. Reviewed-by: Dmitry Baryshkov Signed-off-by: Soutrik Mukhopadhyay --- v2: Fixed review comments from Dmitry - Reused edp_swing_hbr_rbr and edp_swing_hbr2_hbr3 for v5. v3: No change v4: No change v5: No change --- dri

[PATCH v5 2/5] phy: qcom: edp: Introduce aux_cfg array for version specific aux settings

In order to support different HW versions, introduce aux_cfg array to move v4 specific aux configuration settings. Reviewed-by: Dmitry Baryshkov Signed-off-by: Soutrik Mukhopadhyay --- v2: Fixed review comments from Bjorn and Dmitry - Made aux_cfg array as const. v3: Fixed review commen

[PATCH v5 5/5] drm/msm/dp: Add DisplayPort controller for SA8775P

The Qualcomm SA8775P platform comes with 2 DisplayPort controllers for each mdss, having different base offsets than the previous SoCs. The support for all 4 DPTX have been added here, and validation of only MDSS0 DPTX0 and DPTX1 have been conducted. Reviewed-by: Dmitry Baryshkov Signed-off-by: S

[PATCH v5 1/5] dt-bindings: phy: Add eDP PHY compatible for sa8775p

Add compatible string for the supported eDP PHY on sa8775p platform. Acked-by: Krzysztof Kozlowski Signed-off-by: Soutrik Mukhopadhyay --- v2: No change v3: No change v4: No change v5: No change --- Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml | 1 + 1 file changed, 1 insertion(+