Re: [PATCH v2] drm/msm: Fix some typos in comment

2024-09-21 Thread Dmitry Baryshkov
On Thu, Sep 12, 2024 at 03:04:20PM GMT, Shen Lichuan wrote: > Fixed some spelling errors, the details are as follows: > > -in the code comments: > collpase->collapse > firwmare->firmware > everwhere->everywhere > > Fixes: 2401a0084614 ("drm/msm: gpu: Add support for the GPMU") >

[PATCH] drm/msm/hdmi: drop pll_cmp_to_fdata from hdmi_phy_8998

2024-09-21 Thread Dmitry Baryshkov
The pll_cmp_to_fdata() was never used by the working code. Drop it to prevent warnings with W=1 and clang. Reported-by: Jani Nikula Closes: https://lore.kernel.org/dri-devel/3553b1db35665e6ff08592e35eb438a574d1ad65.1725962479.git.jani.nik...@intel.com Signed-off-by: Dmitry Baryshkov --- driver

Re: (subset) [PATCH v2 0/5] drm: Use IRQF_NO_AUTOEN flag in request_irq()

2024-09-21 Thread Dmitry Baryshkov
On Thu, 12 Sep 2024 16:30:15 +0800, Jinjie Ruan wrote: > As commit cbe16f35bee6 ("genirq: Add IRQF_NO_AUTOEN for request_irq/nmi()") > said, reqeust_irq() and then disable_irq() is unsafe. In the small time gap > between request_irq() and disable_irq(), interrupts can still come. > > IRQF_NO_AUTOE

Re: [PATCH 1/5] dt-bindings: display/msm: Document MDSS on SA8775P

2024-09-21 Thread Dmitry Baryshkov
On Sat, 21 Sept 2024 at 20:23, Krzysztof Kozlowski wrote: > > On 12/09/2024 09:14, Mahadevan wrote: > > > > +clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > > + <&gcc GCC_DISP_HF_AXI_CLK>, > > + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>; > > + > > +inter

Re: [PATCH 1/5] dt-bindings: display/msm: Document MDSS on SA8775P

2024-09-21 Thread Krzysztof Kozlowski
On 12/09/2024 09:14, Mahadevan wrote: > > +clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > + <&gcc GCC_DISP_HF_AXI_CLK>, > + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>; > + > +interrupts = ; > +interrupt-controller; > +#interrupt-cells = <

Re: [PATCH v4 00/11] Preemption support for A7XX

2024-09-21 Thread Neil Armstrong
Le 20/09/2024 à 19:09, Akhil P Oommen a écrit : On Wed, Sep 18, 2024 at 09:46:33AM +0200, Neil Armstrong wrote: Hi, On 17/09/2024 13:14, Antonino Maniscalco wrote: This series implements preemption for A7XX targets, which allows the GPU to switch to an higher priority ring when work is pushed

[PATCH 3/4] drm/msm/mdss: define bitfields for the UBWC_STATIC register

2024-09-21 Thread Dmitry Baryshkov
Rather than hand-coding UBWC_STATIC value calculation, define corresponding bitfields and use them to setup the register value. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 36 +++--- drivers/gpu/drm/msm/msm_mdss.h | 3

[PATCH 4/4] drm/msm/mdss: reuse defined bitfields for UBWC 2.0

2024-09-21 Thread Dmitry Baryshkov
Follow other msm_mdss_setup_ubwc_dec_nn functions and use individual bits instead of just specifying the value to be programmed to the UBWC_STATIC register. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 17 + drivers/gpu/drm/msm/msm_mdss.h | 1 - 2 files c

[PATCH 2/4] drm/msm/mdss: use register definitions instead of hand-coding them

2024-09-21 Thread Dmitry Baryshkov
Move existing register definitions to mdss.xml and use generated defines for registers access instead of hand-coding everything in the source file. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 35 +++--- drivers/gpu/drm/msm/registers/di

[PATCH 1/4] drm/msm: move MDSS registers to separate header file

2024-09-21 Thread Dmitry Baryshkov
In preparation of adding more registers, move MDSS-related headers to the separate top-level file. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/registers/display/mdp5.xml | 16 drivers/gpu/drm/msm/registers/displa

[PATCH 0/4] drm/msm/mdss: rework UBWC registers programming

2024-09-21 Thread Dmitry Baryshkov
d019c6cdc948bb4 change-id: 20240921-msm-mdss-ubwc-105589e05f35 Best regards, -- Dmitry Baryshkov