On 30/07/2024 03:38, Richard Acayan wrote:
> The Snapdragon 670 has a GMU. Add its compatible.
>
> Signed-off-by: Richard Acayan
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
The Snapdragon 670 has the Adreno A615 GPU. Add it along with its device
tree dependencies.
Signed-off-by: Richard Acayan
---
arch/arm64/boot/dts/qcom/sdm670.dtsi | 168 +++
1 file changed, 168 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi
b/arch/arm64
Enable the A615 GPU and GMU for the Pixel 3a. It has zap firmware, so
add that in as well.
Signed-off-by: Richard Acayan
---
arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts
b/arc
The Adreno A615 is used in SDM670. Add an entry to support it along with
the speed bins.
Signed-off-by: Richard Acayan
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
b/drivers/g
The Snapdragon 670 has a GMU. Add its compatible.
Signed-off-by: Richard Acayan
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml
b/Documentation/devicetree/bindings/display/msm/g
This adds support for the speed-binned A615 GPU on SDM670.
Richard Acayan (4):
dt-bindings: display/msm/gmu: Add SDM670 compatible
drm/msm/adreno: add a615 support
arm64: dts: qcom: sdm670: add gpu
arm64: dts: qcom: sdm670-google-common: enable gpu
.../devicetree/bindings/display/msm/gmu
On 7/29/24 06:09, Bjorn Andersson wrote:
On Mon, Jul 22, 2024 at 09:43:13PM GMT, Danila Tikhonov wrote:
From: Eugene Lepshy
Please make sure the subject prefix matches other changes in the same
driver/files.
Regards,
Bjorn
Thanks for the advice
"drm/msm/a6xx: --//--" will be better?
Bes
Quoting Abhinav Kumar (2024-07-29 11:28:35)
>
> Thanks for the feedback.
>
> Your change looks valid. We can use this and drop the max_t usage.
>
> Let me push this with your Suggested-by credits.
You can take my
Signed-off-by: Stephen Boyd
and either squash it in or make a follow-up.
On 7/27/2024 5:51 AM, Dmitry Baryshkov wrote:
On Fri, 26 Jul 2024 at 01:04, Abhinav Kumar wrote:
Currently the DP driver hard-codes the max supported bpp to 30.
This is incorrect because the number of lanes and max data rate
supported by the lanes need to be taken into account.
Replace the
Hi Stephen
On 7/26/2024 5:24 PM, Stephen Boyd wrote:
Quoting Abhinav Kumar (2024-07-25 15:03:19)
diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c
b/drivers/gpu/drm/msm/dp/dp_panel.c
index a916b5f3b317..56ce5e4008f8 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_pa
On Thu, Jul 11, 2024 at 11:10 AM Vladimir Lypak
wrote:
>
> On A5XX GPUs when preemption is used it's invietable to enter a soft
> lock-up state in which GPU is stuck at empty ring-buffer doing nothing.
> This appears as full UI lockup and not detected as GPU hang (because
> it's not). This happens
On Fri, 26 Jul 2024 13:18:25 +0200, Konrad Dybcio wrote:
> Use my @kernel.org address everywhere.
>
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml | 2
> +-
> Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
On Mon, Jul 29, 2024 at 02:40:30PM +0200, Konrad Dybcio wrote:
>
>
> On 29.07.2024 2:13 PM, Konrad Dybcio wrote:
> > On 16.07.2024 1:56 PM, Konrad Dybcio wrote:
> >> On 15.07.2024 10:04 PM, Akhil P Oommen wrote:
> >>> On Tue, Jul 09, 2024 at 12:45:29PM +0200, Konrad Dybcio wrote:
> On recent
Hi Konrad,
> Already sent a series of fixups, but thanks for keeping track
Welcome. Cool that you are at it!
Happy hacking,
Wolfram
signature.asc
Description: PGP signature
The old email address bounced. I found the newer one in MAINTAINERS,
so update entries accordingly.
Cc: Konrad Dybcio
Signed-off-by: Wolfram Sang
---
Against v6.11-rc1. Still needs ack from Konrad Dybcio
MAINTAINERS | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/MAI
On 29.07.2024 2:51 PM, Wolfram Sang wrote:
> The old email address bounced. I found the newer one in MAINTAINERS,
> so update entries accordingly.
>
> Cc: Konrad Dybcio
> Signed-off-by: Wolfram Sang
> ---
Already sent a series of fixups, but thanks for keeping track
https://lore.kernel.org/
On 29.07.2024 2:13 PM, Konrad Dybcio wrote:
> On 16.07.2024 1:56 PM, Konrad Dybcio wrote:
>> On 15.07.2024 10:04 PM, Akhil P Oommen wrote:
>>> On Tue, Jul 09, 2024 at 12:45:29PM +0200, Konrad Dybcio wrote:
On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is
abstracted t
On 16.07.2024 1:56 PM, Konrad Dybcio wrote:
> On 15.07.2024 10:04 PM, Akhil P Oommen wrote:
>> On Tue, Jul 09, 2024 at 12:45:29PM +0200, Konrad Dybcio wrote:
>>> On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is
>>> abstracted through SMEM, instead of being directly available in a
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