Re: [PATCH v2 0/5] Support for Adreno X1-85 GPU

On Sat, Jun 29, 2024 at 07:19:33AM +0530, Akhil P Oommen wrote: > This series adds support for the Adreno X1-85 GPU found in Qualcomm's > compute series chipset, Snapdragon X1 Elite (x1e80100). In this new > naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes > 1st generation a

Re: [PATCH v4 1/5] drm/msm/adreno: Split up giant device table

On Tue, Jun 18, 2024 at 09:42:47AM -0700, Rob Clark wrote: > From: Rob Clark > > Split into a separate table per generation, in preparation to move each > gen's device table to it's own file. > > Signed-off-by: Rob Clark > Reviewed-by: Dmitry Baryshkov > Reviewed-by: Konrad Dybcio > --- > dr

[PATCH v2 5/5] arm64: dts: qcom: x1e80100: Add gpu support

Add the necessary dt nodes for gpu support in X1E80100. Signed-off-by: Akhil P Oommen --- Changes in v2: - Reordered gpu & gmu reg enties to match schema arch/arm64/boot/dts/qcom/x1e80100.dtsi | 195 + 1 file changed, 195 insertions(+) diff --git a/arch/arm64/boot/dts/

[PATCH v2 4/5] dt-bindings: arm-smmu: Add X1E80100 GPU SMMU

Update the devicetree bindings to support the gpu present in X1E80100 platform. Signed-off-by: Akhil P Oommen --- Changes in v2: - New patch in v2 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetre

[PATCH v2 2/5] drm/msm/adreno: Add support for X185 GPU

Add support in drm/msm driver for the Adreno X185 gpu found in Snapdragon X1 Elite chipset. Signed-off-by: Akhil P Oommen --- Changes in v2: - Increased address space size (Rob) - Introduced gmu_chipid in a6xx_info (Rob) - Improved fallback logic for gmxc (Dmitry) drivers/gpu/drm/msm/adreno/a6

[PATCH v2 3/5] drm/msm/adreno: Introduce gmu_chipid for a740 & a750

To simplify, introduce the new gmu_chipid for a740 & a750 GPUs. Signed-off-by: Akhil P Oommen --- Changes in v2: - New patch in v2 drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 2 ++ drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 23 +-- 2 files changed, 3 insertions(+), 22 del

[PATCH v2 0/5] Support for Adreno X1-85 GPU

This series adds support for the Adreno X1-85 GPU found in Qualcomm's compute series chipset, Snapdragon X1 Elite (x1e80100). In this new naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes 1st generation and '8' & '5' denotes the tier and the SKU which it belongs. X1-85 has m

[PATCH v2 1/5] dt-bindings: display/msm/gmu: Add Adreno X185 GMU

Document Adreno X185 GMU in the dt-binding specification. Signed-off-by: Akhil P Oommen Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - Minor update to compatible pattern, '[x]' -> 'x' Documentation/devicetree/bindings/display/msm/gmu.yaml | 4 1 file changed, 4 insertions(+) diff

[PATCH] drm/msm/dpu: check ubwc support before adding compressed formats

On QCM2290 chipset DPU does not support UBWC. Add a dpu cap to indicate this and do not expose compressed formats in this case. changes since RFC: - use ubwc enc and dec version of mdss_data instead of catalog to decide if ubwc is supported Signed-off-by: Abhinav Kumar --- dr

[PATCH 1/5] drm/msm: register a fault handler for display mmu faults

In preparation to register a iommu fault handler for display related modules, register a fault handler for the backing mmu object of msm_kms. Currently, the fault handler only captures the display snapshot but we can expand this later if more information needs to be added to debug display mmu faul

[PATCH 5/5] drm/msm/dpu: rate limit snapshot capture for mmu faults

There is no recovery mechanism in place yet to recover from mmu faults for DPU. We can only prevent the faults by making sure there is no misconfiguration. Rate-limit the snapshot capture for mmu faults to once per msm_kms_init_aspace() as that should be sufficient to capture the snapshot for debu

[PATCH 4/5] drm/msm: switch msm_kms to use msm_iommu_disp_new()

Switch msm_kms to use msm_iommu_disp_new() so that the newly registered fault handler will kick-in during any mmu faults. Signed-off-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/

[PATCH 3/5] drm/msm/iommu: introduce msm_iommu_disp_new() for msm_kms

Introduce a new API msm_iommu_disp_new() for display use-cases. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/msm_iommu.c | 26 ++ drivers/gpu/drm/msm/msm_mmu.h | 1 + 2 files changed, 27 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/

[PATCH 2/5] drm/msm/iommu: rename msm_fault_handler to msm_gpu_fault_handler

In preparation of registering a separate fault handler for display, lets rename the existing msm_fault_handler to msm_gpu_fault_handler. Signed-off-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_iommu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) di

[PATCH 0/5] drm/msm: add a display mmu fault handler

To debug display mmu faults, this series introduces a display fault handler similar to the gpu one. This series has been tested on sc7280 chromebook by using triggering a smmu fault by forcing an incorrect stride on the planes. changes since RFC: - move msm_mmu_set_fault_handler() to msm_

[PATCH 0/5] drm/msm: add a display mmu fault handler

To debug display mmu faults, this series introduces a display fault handler similar to the gpu one. This series has been tested on sc7280 chromebook by using triggering a smmu fault by forcing an incorrect stride on the planes. changes since RFC: - move msm_mmu_set_fault_handler() to msm_

Re: [PATCH v4 1/5] drm/msm/adreno: Implement SMEM-based speed bin

On Fri, Jun 28, 2024 at 10:24:52AM -0700, Elliot Berman wrote: > On Tue, Jun 25, 2024 at 08:28:06PM +0200, Konrad Dybcio wrote: > > On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is > > abstracted through SMEM, instead of being directly available in a fuse. > > > > Add support fo

Re: [PATCH v4 1/5] drm/msm/adreno: Implement SMEM-based speed bin

On Tue, Jun 25, 2024 at 08:28:06PM +0200, Konrad Dybcio wrote: > On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is > abstracted through SMEM, instead of being directly available in a fuse. > > Add support for SMEM-based speed binning, which includes getting > "feature code" and "

Re: [PATCH v1 3/3] arm64: dts: qcom: x1e80100: Add gpu support

1-20240627 (https://download.01.org/0day-ci/archive/20240628/202406282158.ogy7xnu2-...@intel.com/config) compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project ad79a14c9e5ec4a369eed4adf567c22cc029863f) dtschema version: 2024.6.dev3+g650bf2d reproduce (this is a W=1 build): (https:

Re: [PATCH 1/1] dt-bindings: display/msm: dsi-controller-main: Add SM7150

On 28/06/2024 10:23, Danila Tikhonov wrote: > Add the DSI host found on SM7150. > > Signed-off-by: Danila Tikhonov Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof

[PATCH 0/1] Document QCOM SM7150 Compatibility for DSI Controller

This patch updates the DSI controller schema to include the missing SM7150 compatibility. It should addresses the following warning in the SM7150 MDSS schema: qcom,sm7150-mdss.example.dtb: dsi@ae94000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,sm7150-dsi-ctrl', 'qco

[PATCH 1/1] dt-bindings: display/msm: dsi-controller-main: Add SM7150

Add the DSI host found on SM7150. Signed-off-by: Danila Tikhonov --- .../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/

Re: [RFC PATCH] drm/msm/dpu: check ubwc support before adding compressed formats

On Fri, 28 Jun 2024 at 08:44, Abhinav Kumar wrote: > > > > On 6/27/2024 4:22 PM, Dmitry Baryshkov wrote: > > On Fri, 28 Jun 2024 at 00:21, Abhinav Kumar > > wrote: > >> > >> > >> > >> On 6/27/2024 2:13 PM, Rob Clark wrote: > >>> On Thu, Jun 27, 2024 at 1:53 PM Abhinav Kumar > >>> wrote: >