on just for these tags.
They usually get picked up by the patch management software (including
the Fixes tag).
> ---
> Changes in v2:
> - Add Fixes in commit message.
> - Link to v1:
> https://lore.kernel.org/r/20240509-irq_wait-v1-1-41d653e37...@gmail.com
> ---
> drivers/gpu
dices by 1")
Signed-off-by: Barnabás Czémán
---
Changes in v2:
- Add Fixes in commit message.
- Link to v1:
https://lore.kernel.org/r/20240509-irq_wait-v1-1-41d653e37...@gmail.com
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
no
WOULDBLOCK;
}
- if (irq_idx < 0) {
+ if (irq_idx == 0) {
DRM_DEBUG_KMS("skip irq wait id=%u, callback=%ps\n",
DRMID(phys_enc->parent), func);
return 0;
---
base-commit: 704ba27ac55579704ba1289392448b0c66b56258
ch
[INTR_IDX_CTL_START]);
---
base-commit: 704ba27ac55579704ba1289392448b0c66b56258
change-id: 20240509-ctl_irq-a90b2d7a0bf5
Best regards,
On 5/9/2024 9:48 AM, Jonathan Corbet wrote:
Dmitry Baryshkov writes:
The drm/msm driver had adopted using Python3 script to generate register
header files instead of shipping pre-generated header files. Document
the minimal Python version supported by the script.
Signed-off-by: Dmitry Bary
gpu_read(gpu, reg);
}
static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or)
---
base-commit: ec2d9beb604a623a9f5308f7abcff3561e08c155
change-id: 20240509-topic-adreno-a8939b92f625
Best regards,
--
Konrad Dybcio
Dmitry Baryshkov writes:
> The drm/msm driver had adopted using Python3 script to generate register
> header files instead of shipping pre-generated header files. Document
> the minimal Python version supported by the script.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> Documentation/process/cha
With a7xx, we need to import a new header for each new generation and
switch to a different list of registers, instead of making
backwards-compatible changes. Using the helpers inadvertently made a750
use the a740 list of registers, instead use the family directly to fix
this.
Fixes: f3f8207d8aed
This was missed thanks to the family mixup fixed in the previous commit.
Fixes: f3f8207d8aed ("drm/msm: Add devcoredump support for a750")
Signed-off-by: Connor Abbott
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drive
a7xx family directly in gpu_state
drm/msm: Dump correct dbgahb clusters on a750
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 46 +++--
1 file changed, 24 insertions(+), 22 deletions(-)
---
base-commit: 5acf1f91d74433cbfffd9df962b6e45f5d3ef253
change-id: 20240509
== ===
.. [#f1] Sphinx is needed only to build the Kernel documentation
---
base-commit: 704ba27ac55579704ba1289392448b0c66b56258
change-id: 20240509-python-version-a8b6ca2125ff
Best regards,
--
Dmitry Baryshkov
On Wed, 8 May 2024 at 02:05, Abhinav Kumar wrote:
>
> Since commit 5acf49119630 ("drm/msm: import gen_header.py script from Mesa"),
> compilation is broken on machines having python versions older than 3.9
> due to dependency on argparse.BooleanOptionalAction.
>
> Switch to use simple bool for the
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