On Tue, 12 Dec 2023 at 02:23, Abhinav Kumar wrote:
>
> Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
> that it has only RGB formats and can be used on any chipset having a WB
> block.
>
> Introduce a new wb2_formats_rgb_yuv array to the catalog to
> indicate support for YU
On Tue, 12 Dec 2023 at 02:23, Abhinav Kumar wrote:
>
> Reserve CDM blocks for writeback if the format of the output fb
> is YUV. At the moment, the reservation is done only for writeback
> but can easily be extended by relaxing the checks once other
> interfaces are ready to output YUV.
>
> change
On Tue, 12 Dec 2023 at 02:23, Abhinav Kumar wrote:
>
> Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
> the writeback encoder to setup the CDM block.
>
> Currently, this is defined and used within the writeback's physical
> encoder layer however, the function can be modified t
On Mon, 11 Dec 2023 at 23:48, Abhinav Kumar wrote:
>
>
>
> On 12/11/2023 1:42 PM, Dmitry Baryshkov wrote:
> > On Mon, 11 Dec 2023 at 23:32, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 12/11/2023 1:31 PM, Dmitry Baryshkov wrote:
> >>> On Mon, 11 Dec 2023 at 23:16, Abhinav Kumar
> >>> wrote:
On Tue, 12 Dec 2023 at 02:23, Abhinav Kumar wrote:
>
> Since the type and usage of CSC matrices is spanning across DPU
> lets introduce a helper to the dpu_hw_util to return the CSC
> corresponding to the request type. This will help to add more
> supported CSC types such as the RGB to YUV one whi
On Tue, 12 Dec 2023 at 02:23, Abhinav Kumar wrote:
>
> In preparation for adding more formats to dpu writeback add
> format validation to it to fail any unsupported formats.
>
> changes in v3:
> - rebase on top of msm-next
> - replace drm_atomic_helper_check_wb_encoder_state() with
On Tue, 12 Dec 2023 at 02:03, Kuogee Hsieh wrote:
>
>
> On 12/11/2023 1:30 PM, Dmitry Baryshkov wrote:
> > On Mon, 11 Dec 2023 at 20:38, Kuogee Hsieh wrote:
> >> A DCE (Display Compression Engine) contains two DSC hard slice
> >> encoders. Each DCE start with even DSC encoder index followed by
>
On Tue, 12 Dec 2023 at 02:30, Abhinav Kumar wrote:
>
>
>
> On 12/2/2023 4:31 PM, Dmitry Baryshkov wrote:
> > I was not able to test it on my own, this is a call for testing for the
> > owners of these platforms. The git version of modetest now fully
> > supports writeback.
> >
> > Use libdrm >= 2.
On 12/2/2023 4:31 PM, Dmitry Baryshkov wrote:
I was not able to test it on my own, this is a call for testing for the
owners of these platforms. The git version of modetest now fully
supports writeback.
Use libdrm >= 2.4.117, run modetest -ac to determine the writeback
connector, cat /sys/ker
CDM block will need its own logic to program the flush and active
bits in the dpu_hw_ctl layer.
Make necessary changes in dpu_hw_ctl to support CDM programming.
changes in v3:
- drop unused cdm_active as reported by kbot
- retained the R-b as its a trivial change
changes in v2:
Reserve CDM blocks for writeback if the format of the output fb
is YUV. At the moment, the reservation is done only for writeback
but can easily be extended by relaxing the checks once other
interfaces are ready to output YUV.
changes in v3:
- squash CDM disable during encoder cleanup into
CDM block comes with its own set of registers and operations
which can be done. In-line with other hardware blocks, this
change adds the dpu_hw_cdm abstraction for the CDM block.
changes in v3:
- fix commit text from sub-blk to blk for CDM
- fix kbot issue for missing static for dp
To setup and enable CDM block for the writeback pipeline, lets
add the pieces together to set the active bits and the flush
bits for the CDM block.
changes in v2:
- passed the cdm idx to update_pending_flush_cdm()
(have retained the R-b as its a minor change)
Signed-off-by: Abhi
Now that CDM block support has been added to DPU lets also add its
entry to the DPU snapshot to help debugging.
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp
Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
that it has only RGB formats and can be used on any chipset having a WB
block.
Introduce a new wb2_formats_rgb_yuv array to the catalog to
indicate support for YUV formats to writeback in addition to RGB.
Chipsets which have s
Add CDM blocks to the sm8250 dpu_hw_catalog to support
YUV format output from writeback block.
changes in v2:
- re-use the cdm definition from sc7280
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 1 +
1 file chan
Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
the writeback encoder to setup the CDM block.
Currently, this is defined and used within the writeback's physical
encoder layer however, the function can be modified to be used to setup
the CDM block even for non-writeback interfa
Even though there is usually only one CDM block, it can be
used by either HDMI, DisplayPort OR Writeback interfaces.
Hence its allocation needs to be tracked properly by the
resource manager to ensure appropriate availability of the
block.
changes in v2:
- move needs_cdm to topology struc
Add the RM APIs necessary to initialize and allocate CDM
blocks to be used by the rest of the DPU pipeline.
changes in v2:
- treat cdm_init() failure as fatal
- fixed the commit text
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dp
Since the type and usage of CSC matrices is spanning across DPU
lets introduce a helper to the dpu_hw_util to return the CSC
corresponding to the request type. This will help to add more
supported CSC types such as the RGB to YUV one which is used in
the case of CDM.
changes in v3:
- drop
dpu_encoder_phys_wb_setup_cdp() is not programming the chroma down
prefetch block. Its setting up the display ctl path for writeback.
Hence rename it to dpu_encoder_phys_wb_setup_ctl() to match what its
actually doing.
Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for
write
Add CDM blocks to the sc7280 dpu_hw_catalog to support
YUV format output from writeback block.
changes in v3:
- change the comment from sub-blk to clk for CDM
changes in v2:
- remove explicit zero assignment for features
- move sc7280_cdm to dpu_hw_catalog from the sc7280
For YUV cases, setting the required format bits was missed
out in the register programming. Lets fix it now in preparation
of adding YUV formats support for writeback.
changes in v2:
- dropped the fixes tag as its not a fix but adding
new functionality
Signed-off-by: Abhinav Kumar
Revi
In preparation for adding more formats to dpu writeback add
format validation to it to fail any unsupported formats.
changes in v3:
- rebase on top of msm-next
- replace drm_atomic_helper_check_wb_encoder_state() with
drm_atomic_helper_check_wb_connector_state() due to th
Chroma Down Sampling (CDM) block is a hardware block in the DPU pipeline
which among other things has a CSC block that can convert RGB input
from the DPU to YUV data.
This block can be used with either HDMI, DP or writeback interface.
In this series, lets first add the support for CDM block to be
On 12/11/2023 1:30 PM, Dmitry Baryshkov wrote:
On Mon, 11 Dec 2023 at 20:38, Kuogee Hsieh wrote:
A DCE (Display Compression Engine) contains two DSC hard slice
encoders. Each DCE start with even DSC encoder index followed by
"starts". But it will not be correct. The DCE doesn't start with th
On Mon, Dec 11, 2023 at 2:09 PM Marijn Suijten
wrote:
>
> On 2023-12-11 10:19:55, Rob Clark wrote:
> > From: Rob Clark
> >
> > When we start getting these, we get a *lot*. So ratelimit it to not
> > flood dmesg.
> >
> > Signed-off-by: Rob Clark
> > ---
> >
> > dpu should probably stop rolling i
On 2023-12-10 6:06 pm, Rob Clark wrote:
From: Rob Clark
In some cases the firmware expects cbndx 1 to be assigned to the GMU,
so we also want the default domain for the GMU to be an identy domain.
This way it does not get a context bank assigned. Without this, both
of_dma_configure() and drm/m
On 2023-12-11 10:19:55, Rob Clark wrote:
> From: Rob Clark
>
> When we start getting these, we get a *lot*. So ratelimit it to not
> flood dmesg.
>
> Signed-off-by: Rob Clark
> ---
>
> dpu should probably stop rolling it's own trace macros, but that would
> be a larger cleanup.
That would be
On 10/12/2023 00:21, Dmitry Baryshkov wrote:
> Add compatible string for the DisplayPort controller found on the
> Qualcomm SM8150 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 12/11/2023 1:42 PM, Dmitry Baryshkov wrote:
On Mon, 11 Dec 2023 at 23:32, Abhinav Kumar wrote:
On 12/11/2023 1:31 PM, Dmitry Baryshkov wrote:
On Mon, 11 Dec 2023 at 23:16, Abhinav Kumar wrote:
On 12/8/2023 3:19 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kum
On Mon, 11 Dec 2023 at 23:32, Abhinav Kumar wrote:
>
>
>
> On 12/11/2023 1:31 PM, Dmitry Baryshkov wrote:
> > On Mon, 11 Dec 2023 at 23:16, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 12/8/2023 3:19 AM, Dmitry Baryshkov wrote:
> >>> On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> >>> wrote:
>
On 12/11/2023 1:31 PM, Dmitry Baryshkov wrote:
On Mon, 11 Dec 2023 at 23:16, Abhinav Kumar wrote:
On 12/8/2023 3:19 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Add CDM blocks to the sc7280 dpu_hw_catalog to support
YUV format output from writeback blo
On Mon, 11 Dec 2023 at 23:16, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 3:19 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> Add CDM blocks to the sc7280 dpu_hw_catalog to support
> >> YUV format output from writeback block.
> >>
> >> changes in v2
On Mon, 11 Dec 2023 at 20:38, Kuogee Hsieh wrote:
>
> A DCE (Display Compression Engine) contains two DSC hard slice
> encoders. Each DCE start with even DSC encoder index followed by
"starts". But it will not be correct. The DCE doesn't start with the
DSC encoder. DCE consists of two DSC encoder
On 12/11/2023 6:54 AM, Dmitry Baryshkov wrote:
The drmm handler will perform drm_encoder_cleanup() for us. Moreover if
we call drm_encoder_cleanup() manually, the drmm_encoder_alloc_release()
will spawn warnings at drivers/gpu/drm/drm_encoder.c:214. Drop these
extra drm_encoder_cleanup() calls
On 11/6/2023 4:43 PM, Dmitry Baryshkov wrote:
The funcion dp_display_get_next_bridge() can return -EPROBE_DEFER if the
next bridge is not (yet) available. However returning -EPROBE_DEFER from
msm_dp_modeset_init() is not ideal. This leads to -EPROBE return from
component_bind, which can easily
On 12/8/2023 3:19 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Add CDM blocks to the sc7280 dpu_hw_catalog to support
YUV format output from writeback block.
changes in v2:
- remove explicit zero assignment for features
- move sc7280_cdm t
On 10/12/2023 00:21, Dmitry Baryshkov wrote:
> Add compatible string for the DisplayPort controller found on the
> Qualcomm SM8150 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Mon, 11 Dec 2023 at 19:59, Kuogee Hsieh wrote:
>
>
> On 12/6/2023 1:35 AM, Dmitry Baryshkov wrote:
> > On 05/12/2023 22:51, Kuogee Hsieh wrote:
> >>
> >> On 12/5/2023 11:23 AM, Dmitry Baryshkov wrote:
> >>> On Tue, 5 Dec 2023 at 20:12, Kuogee Hsieh
> >>> wrote:
>
> On 12/4/2023 4:23
A DCE (Display Compression Engine) contains two DSC hard slice
encoders. Each DCE start with even DSC encoder index followed by
an odd DSC encoder index. Each encoder can work independently.
But Only two DSC encoders from same DCE can be paired to work
together to support merge mode. In addition, t
On 12/11/2023 10:19 AM, Rob Clark wrote:
From: Rob Clark
When we start getting these, we get a *lot*. So ratelimit it to not
flood dmesg.
Signed-off-by: Rob Clark
---
dpu should probably stop rolling it's own trace macros, but that would
be a larger cleanup.
drivers/gpu/drm/msm/disp/d
From: Rob Clark
When we start getting these, we get a *lot*. So ratelimit it to not
flood dmesg.
Signed-off-by: Rob Clark
---
dpu should probably stop rolling it's own trace macros, but that would
be a larger cleanup.
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 -
drivers/gpu/drm/ms
On Tue, Nov 07, 2023 at 02:43:33AM +0200, Dmitry Baryshkov wrote:
> The funcion dp_display_get_next_bridge() can return -EPROBE_DEFER if the
> next bridge is not (yet) available. However returning -EPROBE_DEFER from
> msm_dp_modeset_init() is not ideal. This leads to -EPROBE return from
> component
On 12/6/2023 1:35 AM, Dmitry Baryshkov wrote:
On 05/12/2023 22:51, Kuogee Hsieh wrote:
On 12/5/2023 11:23 AM, Dmitry Baryshkov wrote:
On Tue, 5 Dec 2023 at 20:12, Kuogee Hsieh
wrote:
On 12/4/2023 4:23 PM, Dmitry Baryshkov wrote:
On Tue, 5 Dec 2023 at 01:55, Kuogee Hsieh
wrote:
A DCE (D
On 7.11.2023 01:43, Dmitry Baryshkov wrote:
> The funcion dp_display_get_next_bridge() can return -EPROBE_DEFER if the
> next bridge is not (yet) available. However returning -EPROBE_DEFER from
> msm_dp_modeset_init() is not ideal. This leads to -EPROBE return from
> component_bind, which can ea
On Mon, 11 Dec 2023 at 16:54, Dmitry Baryshkov
wrote:
>
> The drmm handler will perform drm_encoder_cleanup() for us. Moreover if
> we call drm_encoder_cleanup() manually, the drmm_encoder_alloc_release()
> will spawn warnings at drivers/gpu/drm/drm_encoder.c:214. Drop these
> extra drm_encoder_cl
Enable the USB-C related functionality for the USB-C port on this board.
This includes OTG, PowerDelivery and DP AltMode. Also enable the
DisplayPort itself.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 124 +++-
1 file changed, 123 insertions
Expand first USB host controller device node with the OF ports required
to support USB-C / DisplayPort switching.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
Expand Combo USB+DP QMP PHY device node with the OF ports required to
support USB-C / DisplayPort switching.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dt
The SM8150-HDK uses two different regulators to power up SuperSpeed USB
PHYs. The L5A regulator is used for the second USB host, while the first
(OTG) USB host uses different regulator, L18A. Fix the regulator for the
usb_1 QMPPHY and (to remove possible confusion) drop the
usb_ss_dp_core_1/_2 labe
Add required-opps property to the display clock controller. This makes
it cast minimal vote on the MMCX lane and prevents further 'clock stuck'
errors when enabling the display.
Fixes: 2ef3bb17c45c ("arm64: dts: qcom: sm8150: Add DISPCC node")
Acked-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshk
Add DSI outputs and link them to the onboard Lontium LT9611 DSI-to-HDMI
bridge, enabling HDMI output on this board. While adding the display
resources, also drop the headless ("amd,imageon") compat string from the
GPU node, since the board now has output.
Signed-off-by: Dmitry Baryshkov
---
arch
Add device tree node for the DisplayPort controller and link it to the
display controller interface.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 87
1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
b/
Add compatible string for the DisplayPort controller found on the
Qualcomm SM8150 platform.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-co
Enable display output on the SM8150 HDK device. This includes HDMI
output through the onboard DSI-HDMI bridge and DP output on the USB-C
port.
Changes since v1
- Dropped irrelevant stats patch
- Fixed endpoint stye (Konrad)
- Changed SVID from u32 to 16-bits value (Konrad)
Dmitry Baryshkov (8):
The drmm handler will perform drm_encoder_cleanup() for us. Moreover if
we call drm_encoder_cleanup() manually, the drmm_encoder_alloc_release()
will spawn warnings at drivers/gpu/drm/drm_encoder.c:214. Drop these
extra drm_encoder_cleanup() calls.
Fixes: cd42c56d9c0b ("drm/msm/dpu: use drmm-manag
On Thu, Dec 07, 2023 at 01:06:09PM +, Robin Murphy wrote:
> On 07/12/2023 12:54 pm, Dmitry Baryshkov wrote:
> > In preparation of dropping most of ARCH_QCOM subtypes, stop limiting the
> > driver just to those machines. Allow it to be built for any 32-bit
> > Qualcomm platform (ARCH_QCOM).
>
>
Am 05.12.23 um 20:02 schrieb Rob Clark:
From: Rob Clark
Container fences have burner contexts, which makes the trick to store at
most one fence per context somewhat useless if we don't unwrap array or
chain fences.
Signed-off-by: Rob Clark
Reviewed-by: Christian König
---
drivers/gpu/d
On Sun, Dec 10, 2023 at 10:06:53AM -0800, Rob Clark wrote:
> From: Rob Clark
>
> In some cases the firmware expects cbndx 1 to be assigned to the GMU,
> so we also want the default domain for the GMU to be an identy domain.
> This way it does not get a context bank assigned. Without this, both
>
On 11.12.2023 10:46, Dmitry Baryshkov wrote:
> On Mon, 11 Dec 2023 at 11:33, Konrad Dybcio wrote:
>>
>> On 10.12.2023 00:21, Dmitry Baryshkov wrote:
>>> Expand Combo USB+DP QMP PHY device node with the OF ports required to
>>> support USB-C / DisplayPort switching.
>>>
>>> Signed-off-by: Dmitry Ba
On Mon, 11 Dec 2023 at 11:33, Konrad Dybcio wrote:
>
> On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> > Expand Combo USB+DP QMP PHY device node with the OF ports required to
> > support USB-C / DisplayPort switching.
> >
> > Signed-off-by: Dmitry Baryshkov
> > ---
> > arch/arm64/boot/dts/qcom/sm
On Mon, 11 Dec 2023 at 11:33, Konrad Dybcio wrote:
>
> On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> > Enable the USB-C related functionality for the USB-C port on this board.
> > This includes OTG, PowerDelivery and DP AltMode. Also enable the
> > DisplayPort itself.
> >
> > Signed-off-by: Dmitr
On Mon, 11 Dec 2023 at 11:31, Konrad Dybcio wrote:
>
> On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> > Add DSI outputs and link them to the onboard Lontium LT9611 DSI-to-HDMI
> > bridge, enabling HDMI output on this board. While adding the display
> > resources, also drop the headless ("amd,image
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> Enable the USB-C related functionality for the USB-C port on this board.
> This includes OTG, PowerDelivery and DP AltMode. Also enable the
> DisplayPort itself.
>
> Signed-off-by: Dmitry Baryshkov
> ---
[...]
> +&pm8150b_typec {
> + status = "o
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> Expand Combo USB+DP QMP PHY device node with the OF ports required to
> support USB-C / DisplayPort switching.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 23 +++
> 1 file changed, 23 insert
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> The SM8150-HDK uses two different regulators to power up SuperSpeed USB
> PHYs. The L5A regulator is used for the second USB host, while the first
> (OTG) USB host uses different regulator, L18A. Fix the regulator for the
> usb_1 QMPPHY and (to remove
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> Add DSI outputs and link them to the onboard Lontium LT9611 DSI-to-HDMI
> bridge, enabling HDMI output on this board. While adding the display
> resources, also drop the headless ("amd,imageon") compat string from the
> GPU node, since the board now ha
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> Add required-opps property to the display clock controller. This makes
> it cast minimal vote on the MMCX lane and prevents further 'clock stuck'
> errors when enabling the display.
>
> Fixes: 2ef3bb17c45c ("arm64: dts: qcom: sm8150: Add DISPCC node")
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
> The SM8150 platform doesn't support DDR sleep stats, so it needs
> SoC-specific compat string for the RPMh stats data.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Not a fan, see my comments over at [1].
Konrad
[1]
https://lore.kernel.org/linux-arm-m
70 matches
Mail list logo
