On Sat, 9 Dec 2023 at 01:09, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 12:45 PM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 19:53, Abhinav Kumar
> > wrote:
> >> On 12/8/2023 3:44 AM, Dmitry Baryshkov wrote:
> >>> On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> >>> wrote:
>
> Lets
On 12/8/2023 12:45 PM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 19:53, Abhinav Kumar wrote:
On 12/8/2023 3:44 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
that it has only RGB for
On 12/8/2023 12:55 PM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 19:28, Abhinav Kumar wrote:
On 12/8/2023 3:52 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
the writeback encoder to se
On Fri, 8 Dec 2023 at 19:28, Abhinav Kumar wrote:
> On 12/8/2023 3:52 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
> >> the writeback encoder to setup the CDM block.
> >>
> >> C
On Fri, 8 Dec 2023 at 19:40, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 4:14 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:06, Abhinav Kumar
> > wrote:
> >>
> >> Chroma Down Sampling (CDM) block is a hardware block in the DPU pipeline
> >> which among other things has a CSC block that
On Fri, 8 Dec 2023 at 19:53, Abhinav Kumar wrote:
> On 12/8/2023 3:44 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
> >> that it has only RGB formats and can be used on any ch
From: Luben Tuikov
Reverse run-queue priority enumeration such that the higest priority is now 0,
and for each consecutive integer the prioirty diminishes.
Run-queues correspond to priorities. To an external observer a scheduler
created with a single run-queue, and another created with
DRM_SCHED
From: Luben Tuikov
Rename DRM_SCHED_PRIORITY_MIN to DRM_SCHED_PRIORITY_LOW.
This mirrors DRM_SCHED_PRIORITY_HIGH, for a list of DRM scheduler priorities
in ascending order,
DRM_SCHED_PRIORITY_LOW,
DRM_SCHED_PRIORITY_NORMAL,
DRM_SCHED_PRIORITY_HIGH,
DRM_SCHED_PRIORITY_KERNEL.
Cc: Rob Cla
On 12/2/2023 4:27 PM, Dmitry Baryshkov wrote:
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 18 ++
1 file changed, 18 insertions(+)
Reviewed-by: Abhinav Kumar
On 12/2/2023 4:27 PM, Dmitry Baryshkov wrote:
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 18 ++
1 file changed, 18 insertions(+)
Reviewed-by: Abhinav Kumar
On 12/2/2023 4:27 PM, Dmitry Baryshkov wrote:
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 18 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 --
2
On Fri, 8 Dec 2023 at 19:09, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 4:06 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> CDM block comes with its own set of registers and operations
> >> which can be done. In-line with other hardware sub-blocks,
On 12/8/2023 3:44 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
that it has only RGB formats and can be used on any chipset having a WB
block.
Introduce a new wb2_formats_rgb_yuv array to
On 12/8/2023 4:14 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:06, Abhinav Kumar wrote:
Chroma Down Sampling (CDM) block is a hardware block in the DPU pipeline
which among other things has a CSC block that can convert RGB input
from the DPU to YUV data.
This block is more or less
On 12/8/2023 3:52 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
the writeback encoder to setup the CDM block.
Currently, this is defined and used within the writeback's physical
encoder laye
On 12/8/2023 4:06 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
CDM block comes with its own set of registers and operations
which can be done. In-line with other hardware sub-blocks, this
I always thought that sub-blocks refer to the dpu_foo_sub_blks data,
On 12/8/2023 8:38 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 18:34, Abhinav Kumar wrote:
On 12/8/2023 3:54 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Reserve CDM blocks for writeback if the format of the output fb
is YUV. At the moment, the re
On Fri, 8 Dec 2023 at 18:35, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 8:27 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 18:24, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
> >>> On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> >>> wrote:
> >>
On Fri, 8 Dec 2023 at 18:34, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 3:54 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> Reserve CDM blocks for writeback if the format of the output fb
> >> is YUV. At the moment, the reservation is done only for
On 12/8/2023 8:27 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 18:24, Abhinav Kumar wrote:
On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Since the type and usage of CSC matrices is spanning across DPU
lets introduce a helper to th
On 12/8/2023 3:54 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Reserve CDM blocks for writeback if the format of the output fb
is YUV. At the moment, the reservation is done only for writeback
but can easily be extended by relaxing the checks once other
inte
On Fri, 8 Dec 2023 at 18:24, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> Since the type and usage of CSC matrices is spanning across DPU
> >> lets introduce a helper to the dpu_hw_util to return th
On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Since the type and usage of CSC matrices is spanning across DPU
lets introduce a helper to the dpu_hw_util to return the CSC
corresponding to the request type. This will help to add more
supporte
On 12/06, Melissa Wen wrote:
> On 11/08, Harry Wentland wrote:
> > Unit testing this in VKMS shows that passing 0 into
> > this function returns -1, which is highly counter-
> > intuitive. Fix it by checking whether the input is
> > >= 0 instead of > 0.
> >
> Nice finding. Thanks!
>
> Could you a
On Wed, 29 Nov 2023 15:43:57 +0100, Konrad Dybcio wrote:
> This series brings:
> - interconnect plumbing
> - display setup
>
> for QCM2290/QRB2210 and
>
> - CAN bus controller
> - HDMI display
> - wifi fw variant name
>
> [...]
Applied, thanks!
[04/12] dt-bindings: firmware: qcom,scm: Allow
On Fri, 8 Dec 2023 at 07:06, Abhinav Kumar wrote:
>
> Chroma Down Sampling (CDM) block is a hardware block in the DPU pipeline
> which among other things has a CSC block that can convert RGB input
> from the DPU to YUV data.
This block is more or less standard between all hw versions. I do not
ex
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> CDM block comes with its own set of registers and operations
> which can be done. In-line with other hardware sub-blocks, this
I always thought that sub-blocks refer to the dpu_foo_sub_blks data,
which CDM doesn't have.
> change adds the dpu
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Reserve CDM blocks for writeback if the format of the output fb
> is YUV. At the moment, the reservation is done only for writeback
> but can easily be extended by relaxing the checks once other
> interfaces are ready to output YUV.
>
> changes
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
> the writeback encoder to setup the CDM block.
>
> Currently, this is defined and used within the writeback's physical
> encoder layer however, the function can be modified to
On 07/12/2023 9:24 pm, Rob Clark wrote:
From: Rob Clark
We also want the default domain for the GMU to be an identy domain,
so it does not get a context bank assigned. Without this, both
of_dma_configure() and drm/msm's iommu_domain_attach() will trigger
allocating and configuring a context ba
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
> that it has only RGB formats and can be used on any chipset having a WB
> block.
>
> Introduce a new wb2_formats_rgb_yuv array to the catalog to
> indicate support for YUV
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> In preparation of setting up CDM block, add the logic to disable it
> properly during encoder cleanup.
>
> changes in v2:
> - call update_pending_flush_cdm even when bind_pingpong_blk
> is not present
>
> Signed-off-by: Abhina
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> CDM block will need its own logic to program the flush and active
> bits in the dpu_hw_ctl layer.
>
> Make necessary changes in dpu_hw_ctl to support CDM programming.
>
> changes in v2:
> - remove unused empty line
> - pass in c
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Even though there is usually only one CDM block, it can be
> used by either HDMI, DisplayPort OR Writeback interfaces.
>
> Hence its allocation needs to be tracked properly by the
> resource manager to ensure appropriate availability of the
> b
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add the RM APIs necessary to initialize and allocate CDM
> blocks to be used by the rest of the DPU pipeline.
>
> changes in v2:
> - treat cdm_init() failure as fatal
> - fixed the commit text
>
> Signed-off-by: Abhinav Kumar
>
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add CDM blocks to the sm8250 dpu_hw_catalog to support
> YUV format output from writeback block.
>
> changes in v2:
> - re-use the cdm definition from sc7280
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/disp/dpu1/catal
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add CDM blocks to the sc7280 dpu_hw_catalog to support
> YUV format output from writeback block.
>
> changes in v2:
> - remove explicit zero assignment for features
> - move sc7280_cdm to dpu_hw_catalog from the sc7280
>
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add CDM blocks to the sc7280 dpu_hw_catalog to support
> YUV format output from writeback block.
>
> changes in v2:
> - remove explicit zero assignment for features
> - move sc7280_cdm to dpu_hw_catalog from the sc7280
>
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Since the type and usage of CSC matrices is spanning across DPU
> lets introduce a helper to the dpu_hw_util to return the CSC
> corresponding to the request type. This will help to add more
> supported CSC types such as the RGB to YUV one whic
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> For YUV cases, setting the required format bits was missed
> out in the register programming. Lets fix it now in preparation
> of adding YUV formats support for writeback.
>
> changes in v2:
> - dropped the fixes tag as its not a fix but ad
On Fri, 08 Dec 2023 04:03:14 +0300, Dmitry Baryshkov wrote:
> As the renamed drm_atomic_helper_check_wb_connector_state() now accepts
> drm_writeback_connector as the first argument (instead of drm_encoder),
> move the VKMS writeback atomic_check from drm_encoder_helper_funcs to
> drm_connector_hel
On Fri, 08 Dec 2023 04:03:13 +0300, Dmitry Baryshkov wrote:
> The drm_atomic_helper_check_wb_encoder_state() function doesn't use
> encoder for anything other than getting the drm_device instance. The
> function's description talks about checking the writeback connector
> state, not the encoder sta
On 08/12/2023 04:38, Bjorn Andersson wrote:
On Thu, Dec 07, 2023 at 05:37:19PM +0100, Neil Armstrong wrote:
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
[..]
+
+ mdss_dp0: displayport-controller@af54000 {
+
On Thu, Dec 07, 2023 at 01:24:39PM -0800, Rob Clark wrote:
> From: Rob Clark
>
> We also want the default domain for the GMU to be an identy domain,
> so it does not get a context bank assigned. Without this, both
> of_dma_configure() and drm/msm's iommu_domain_attach() will trigger
> allocating
On 07/12/2023 20:47, Konrad Dybcio wrote:
On 12/7/23 17:37, Neil Armstrong wrote:
Declare the displayport controller present on the Qualcomm SM8650 SoC
and connected to the USB3/DP Combo PHY.
Signed-off-by: Neil Armstrong
---
[...]
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
45 matches
Mail list logo
