Re: [Freedreno] [PATCH v6 6/6] drm/drm-file: Show finer-grained BO sizes in drm_show_memory_stats

2023-09-21 Thread Tvrtko Ursulin
On 20/09/2023 16:32, Tvrtko Ursulin wrote: On 20/09/2023 00:34, Adrián Larumbe wrote: The current implementation will try to pick the highest available size display unit as soon as the BO size exceeds that of the previous multiplier. That can lead to loss of precision in contexts of low memor

Re: [Freedreno] [PATCH 2/3] drm/msm/dpu: Add missing DPU_DSC_OUTPUT_CTRL to SC7280

2023-09-21 Thread Konrad Dybcio
On 9/21/23 02:01, Abhinav Kumar wrote: On 9/20/2023 3:46 PM, Konrad Dybcio wrote: DPU_DSC_OUTPUT_CTRL should be enabled for all platforms with a CTL CFG 1.0.0. SC7280 is one of them. Add it. sc7280 and all other chipsets using DSC 1.2 use dpu_hw_dsc_init_1_2 and not dpu_hw_dsc_init. d

Re: [Freedreno] [PATCH 1/3] drm/msm/dpu: Fix SC7280 PP length

2023-09-21 Thread Konrad Dybcio
On 9/21/23 01:41, Abhinav Kumar wrote: On 9/20/2023 3:46 PM, Konrad Dybcio wrote: Commit 194347df5844 ("drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macros") unrolled a macro incorrectly. Fix that. No, its correct from what i can tell. Before inlining it was using PP_BLK_DITHER macro and