Quoting Dmitry Baryshkov (2022-06-17 16:07:58)
> On 17/06/2022 23:47, Stephen Boyd wrote:
> > This struct member is stored to in the function that calls the function
> > which uses it. That's possible with a function argument instead of
> > storing to a struct member. Pass the pixel_rate as an argu
The 'vsync_cnt' is used to count the number of frames for a crtc.
Unfortunately, we increment the count after waking up userspace via
dpu_crtc_vblank_callback() calling drm_crtc_handle_vblank().
drm_crtc_handle_vblank() wakes up userspace processes that have called
drm_wait_vblank_ioctl(), and if t
On 21/06/2022 13:53, Vinod Polimera wrote:
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/
On 21/06/2022 13:53, Vinod Polimera wrote:
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drive
On 21/06/2022 13:53, Vinod Polimera wrote:
This change avoids panel prepare/unprepare based on self-refresh
state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 102 +++--
On 21/06/2022 21:54, Dmitry Baryshkov wrote:
On 21/06/2022 13:53, Vinod Polimera wrote:
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Bar
On 21/06/2022 13:53, Vinod Polimera wrote:
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/panel.c
On 21/06/2022 13:53, Vinod Polimera wrote:
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod
Please fix your mailer. You've got the following headers, which clearly
confuse the threading:
In-Reply-To:
References:
Also the y...@qualcomm.com address (present in To:) rejects incoming mail.
On 21/06/2022 13:53, Vinod Polimera wrote:
Changes in v2:
- Use dp bridge to set psr entry/e
On Tue, 21 Jun 2022 at 20:44, Abhinav Kumar wrote:
>
> Copying freedreno
The patch needs to be sent to freedreno@. Otherwise it doesn't exist
in patchwork.
>
> On 6/21/2022 10:42 AM, Abhinav Kumar wrote:
> >
> >
> > On 6/21/2022 4:06 AM, sunliming wrote:
> >> Fixes the following smatch warning:
Copying freedreno
On 6/21/2022 10:42 AM, Abhinav Kumar wrote:
On 6/21/2022 4:06 AM, sunliming wrote:
Fixes the following smatch warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c:261
dpu_encoder_phys_wb_atomic_check() warn: variable dereferenced before
check 'conn_state'
Reporte
On 6/20/2022 11:36 PM, Dmitry Baryshkov wrote:
On Tue, 21 Jun 2022 at 03:50, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Changes since V1:
- Set values_cnt to only include phys with back
On 6/20/2022 11:42 PM, Dmitry Baryshkov wrote:
On Tue, 21 Jun 2022 at 03:50, Jessica Zhang wrote:
Move layer mixer-specific section of dpu_crtc_get_crc() into a separate
helper method. This way, we can make it easier to get CRCs from other HW
blocks by adding other get_crc helper methods.
On 4/26/2022 6:21 AM, Wan Jiabing wrote:
Fix following coccicheck warning:
drivers/gpu/drm/msm/msm_gpu_devfreq.c:72:1-7: WARNING: do_div() does a 64-by-32
division, please consider using div64_ul instead.
Use div64_ul instead of do_div to avoid a possible truncation.
Signed-off-by: Wan Jiab
On Tue, 21 Jun 2022 at 20:02, Kuogee Hsieh wrote:
>
> This patch add regulator_set_load() before enable regulator at
> DP phy driver.
>
> Signed-off-by: Kuogee Hsieh
> Reviewed-by: Stephen Boyd
> Reviewed-by: Douglas Anderson
Reviewed-by: Dmitry Baryshkov
> ---
> drivers/phy/qualcomm/phy-qc
This patch add regulator_set_load() before enable regulator at
eDP phy driver.
Signed-off-by: Kuogee Hsieh
Reviewed-by: Douglas Anderson
Reviewed-by: Dmitry Baryshkov
---
drivers/phy/qualcomm/phy-qcom-edp.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/phy/qualcomm/
This patch add regulator_set_load() before enable regulator at
DP phy driver.
Signed-off-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 43 ---
1 file changed, 33 insertions(+), 10 deletions(-
Vdda regulators are related to both eDP and DP phy so that it should be
managed at eDP and DP phy driver instead of controller. This patch removes
vdda regulators related functions out of eDP/DP controller.
Signed-off-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
Reviewed-by: Dmitry Baryshkov
Revi
0) rebase on https://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git
tree
1) add regulator_set_load() to eDP phy
2) add regulator_set_load() to DP phy
3) remove vdda related function out of eDP/DP controller
Kuogee Hsieh (3):
phy: qcom-edp: add regulator_set_load to edp phy
phy: qco
Hi Bjorn,
>> Add support for basic panel self refresh (PSR) feature for eDP.
>> Add a new interface to set PSR state in the sink from DPU.
>> Program the eDP controller to issue PSR enter and exit SDP to the
>> sink.
>>
>> Signed-off-by: Sankeerth Billakanti
>>
>> Changes in v2:
>> - Use dp bri
Generic comment: y...@qualcomm.com address bounces. Please remove it from
the cc list. If you need to send a patch for the internal reasons,
please use Bcc.
On Tue, 21 Jun 2022 at 12:06, Kalyan Thota wrote:
>
> Crtc color management needs to be registered only for the crtc which has the
> capabil
> -Original Message-
> From: Stephen Boyd
> Sent: Wednesday, February 23, 2022 2:59 AM
> To: quic_vpolimer ; agr...@kernel.org;
> airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
> devicet...@vger.kernel.org; diand...@chromium.org; dri-
> de...@lists.freedesktop.org; freedr
Hi Dmitry,
>On Mon, 21 Feb 2022 at 17:52, Vinod Polimera
>wrote:
>>
>> Add support for basic panel self refresh (PSR) feature for eDP.
>> Add a new interface to set PSR state in the sink from DPU.
>> Program the eDP controller to issue PSR enter and exit SDP to the
>> sink.
>>
>> Signed-off-by: S
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --g
Changes in v2:
- Use dp bridge to set psr entry/exit instead of dpu_enocder.
- Don't modify whitespaces.
- Set self refresh aware from atomic_check.
- Set self refresh aware only if psr is supported.
- Provide a stub for msm_dp_display_set_psr.
- Move dp functions to bridge code.
Chang
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 36 +
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/dp/dp_cata
This change avoids panel prepare/unprepare based on self-refresh
state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 102 +++--
1 file changed, 98 insertions(+), 4 deletion
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 ++
1 file changed, 6 insertio
On Tue, 21 Jun 2022 at 12:06, Kalyan Thota wrote:
>
> Add destination side post processing hw block support in sc7280.
>
> This hwblock enablement is necessary to support color features
> like CT Matix (Ex: Night Light feature)
>
> Change-Id: Iba7d5e1693b06cede2891f5b998466070a77c6ef
> Signed-off-
Add destination side post processing hw block support in sc7280.
This hwblock enablement is necessary to support color features
like CT Matix (Ex: Night Light feature)
Change-Id: Iba7d5e1693b06cede2891f5b998466070a77c6ef
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catal
Crtc color management needs to be registered only for the crtc which has the
capability to handle it. Since topology decides which encoder will get the
dspp hw block, tie up the crtc and the encoder together
(encoder->possible_crtcs)
Change-Id: If5a0f33547b6f527ca4b8fbb78424b141dbbd711
Signed-off
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