On Fri, 31 Dec 2021 at 07:48, Dmitry Baryshkov
wrote:
>
> HI,
>
> On Wed, 29 Dec 2021 at 07:12, Bjorn Andersson
> wrote:
> >
> > On Thu 25 Nov 20:35 CST 2021, Dmitry Baryshkov wrote:
> >
> > > In order to simplify DP code, drop hand-coded loops over clock arrays,
> > > replacing them with clk_bul
HI,
On Wed, 29 Dec 2021 at 07:12, Bjorn Andersson
wrote:
>
> On Thu 25 Nov 20:35 CST 2021, Dmitry Baryshkov wrote:
>
> > In order to simplify DP code, drop hand-coded loops over clock arrays,
> > replacing them with clk_bulk_* functions.
> >
>
> I've yet to debug this, but applying the two patche
If of_find_device_by_node() succeeds, dsi_get_phy() doesn't
a corresponding put_device(). Thus add put_device() to fix the exception
handling.
Fixes: ec31abf ("drm/msm/dsi: Separate PHY to another platform device")
Signed-off-by: Miaoqian Lin
---
drivers/gpu/drm/msm/dsi/dsi.c | 7 ++-
1 file
In most cases the default values of DSI PHY tuning registers
should be sufficient as they are fully optimized. However, in
some cases (for example, where extreme board parasitics cause
the eye shape to degrade), the override bits can be used to
improve the signal quality.
As per the MSM DSI PHY (1
Add 10nm dsi phy tuning properties for phy drive strength and
phy drive level adjustemnt.
Signed-off-by: Rajeev Nandan
---
.../devicetree/bindings/display/msm/dsi-phy-10nm.yaml | 19 +++
1 file changed, 19 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/
This series is to add DSI PHY tuning support in Qualcomm Snapdragon
SoCs with 10nm DSI PHY e.g. SC7180
In most cases the default values of DSI PHY tuning registers
should be sufficient as they are fully optimized. However, in
some cases (for example, where extreme board parasitics cause
the eye sh
On Thu, 30 Dec 2021 at 12:25, Rajeev Nandan wrote:
>
> In most cases the default values of DSI PHY tuning registers
> should be sufficient as they are fully optimized. However, in
> some cases (for example, where extreme board parasitics cause
> the eye shape to degrade), the override bits can be
On Thu, 30 Dec 2021 at 12:25, Rajeev Nandan wrote:
>
> Add 10nm dsi phy tuning properties for phy drive strength and
> phy drive level adjustemnt.
>
> Signed-off-by: Rajeev Nandan
> ---
> .../devicetree/bindings/display/msm/dsi-phy-10nm.yaml | 19
> +++
> 1 file changed, 19 inse
On Thu, 30 Dec 2021 at 12:25, Rajeev Nandan wrote:
>
> Add 10nm dsi phy tuning properties for phy drive strength and
> phy drive level adjustemnt.
>
> Signed-off-by: Rajeev Nandan
> ---
> .../devicetree/bindings/display/msm/dsi-phy-10nm.yaml | 19
> +++
> 1 file changed, 19 inse
