On 7/23/2021 3:51 AM, Rob Clark wrote:
From: Rob Clark
This adds a few things to try and make frequency scaling better match
the workload:
1) Longer polling interval to avoid whip-lashing between too-high and
too-low frequencies in certain workloads, like mobile games which
throttle th
Quoting Kuogee Hsieh (2021-07-22 15:15:17)
> There is a scenario that dp cable is unplugged from DUT during system
> suspended will cause audio option state does not match real connection
> state. Fix this problem by Signaling audio plugged change with realtime
> connection status at dp_pm_resume(
On 2021-07-22 15:09, Stephen Boyd wrote:
Thank you for the comments .
Quoting maitr...@codeaurora.org (2021-07-22 14:33:43)
Thank you Stephen.
On 2021-07-22 13:31, Stephen Boyd wrote:
> Quoting maitreye (2021-07-21 16:19:40)
>> From: Maitreyee Rao
>>
>> Add trace points across the MSM DP drive
On Sat 17 Jul 05:40 PDT 2021, Dmitry Baryshkov wrote:
> We are preparing to support two independent DSI hosts in the DSI/DPU
> code. To remove possible confusion (as both configurations can be
> referenced as dual DSI) let's rename old "dual DSI" (two DSI hosts
> driving single device, with clocks
On 2021-07-22 10:53, Lyude Paul wrote:
On Tue, 2021-07-13 at 15:24 -0700, khs...@codeaurora.org wrote:
On 2021-07-07 01:37, Jani Nikula wrote:
> On Tue, 06 Jul 2021, Kuogee Hsieh wrote:
> > From: Rajkumar Subbiah
> >
> > Commit 2f015ec6eab6 ("drm/dp_mst: Add sideband down request tracing +
> >
From: Rob Clark
This adds a few things to try and make frequency scaling better match
the workload:
1) Longer polling interval to avoid whip-lashing between too-high and
too-low frequencies in certain workloads, like mobile games which
throttle themselves to 30fps.
Previously our polli
From: Rob Clark
In the next patch, it grows a bit more, so lets not duplicate the logic
in multiple places.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gpu
From: Rob Clark
Before we start adding more cleverness, split it into it's own file.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 +-
drivers/gpu/drm/msm/msm_gpu.c | 116 +-
drivers/gpu/drm/m
From: Rob Clark
This is the outcome of trying to fix some bad gpu freq behavior seen in
some use-cases, in particular mobile games that throttle themselves to
30fps. With the existing tuning, we'd end up spending most of the time
that we should be running fast at a low freq, and most of the idle
There is a scenario that dp cable is unplugged from DUT during system
suspended will cause audio option state does not match real connection
state. Fix this problem by Signaling audio plugged change with realtime
connection status at dp_pm_resume() so that audio option will be in
correct state aft
Quoting maitr...@codeaurora.org (2021-07-22 14:33:43)
> Thank you Stephen.
>
> On 2021-07-22 13:31, Stephen Boyd wrote:
> > Quoting maitreye (2021-07-21 16:19:40)
> >> From: Maitreyee Rao
> >>
> >> Add trace points across the MSM DP driver to help debug
> >> interop issues.
> >>
> >> Changes in v4
Thank you Stephen.
On 2021-07-22 13:31, Stephen Boyd wrote:
Quoting maitreye (2021-07-21 16:19:40)
From: Maitreyee Rao
Add trace points across the MSM DP driver to help debug
interop issues.
Changes in v4:
- Changed goto statement and used if else-if
I think drm likes to see all the chang
Quoting maitreye (2021-07-21 16:19:40)
> From: Maitreyee Rao
>
> Add trace points across the MSM DP driver to help debug
> interop issues.
>
> Changes in v4:
> - Changed goto statement and used if else-if
I think drm likes to see all the changelog here to see patch evolution.
>
> Signed-off-by:
Quoting Abhinav Kumar (2021-07-21 19:50:32)
> During board bringups its useful to have a DSI test pattern
> generator to isolate a DPU vs a DSI issue and focus on the relevant
> hardware block.
>
> To facilitate this, add an API which triggers the DSI controller
> test pattern. The expected output
Quoting Abhinav Kumar (2021-07-21 19:50:31)
> Update the DSI controller header XML file to add registers
> and bitfields to support rectangular checkered pattern
> generator.
>
> Signed-off-by: Abhinav Kumar
> ---
Reviewed-by: Stephen Boyd
___
Freedren
Quoting Bjorn Andersson (2021-07-21 19:44:34)
> Some bootloaders set the widebus enable bit in the INTF_CONFIG register,
> but configuration of widebus isn't yet supported ensure that the
> register has a known value, with widebus disabled.
>
> Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driv
Quoting Bjorn Andersson (2021-07-21 19:42:27)
> Not all platforms has P0 at an offset of 0x1000 from the base address,
> so add support for specifying each sub-region in DT. The code falls back
> to the predefined offsets in the case that only a single reg is
> specified, in order to support existi
Quoting Bjorn Andersson (2021-07-21 19:42:26)
> Not all platforms has DP_P0 at offset 0x1000 from the beginning of the
> DP block. So dss_io_data into representing each of the sub-regions, to
"So dss_io_data into" doesn't make sense to me. Is some word or words
missing?
> make it possible in the
Quoting Bjorn Andersson (2021-07-21 19:42:25)
> In order to deal with multiple memory ranges in the following commit
> change the ioremap wrapper to not poke directly into the dss_io_data
> struct.
>
> Signed-off-by: Bjorn Andersson
> ---
> drivers/gpu/drm/msm/dp/dp_parser.c | 28 ++--
Quoting Bjorn Andersson (2021-07-21 19:42:24)
> The non-devres version of ioremap is used, which requires manual
> cleanup. But the code paths leading here is mixed with other devres
> users, so rely on this for ioremap as well to simplify the code.
>
> Signed-off-by: Bjorn Andersson
> ---
Review
Quoting Bjorn Andersson (2021-07-21 19:42:23)
> reg was defined as one region covering the entire DP block, but the
> memory map is actually split in 4 regions and obviously the size of
> these regions differs between platforms.
>
> Switch the reg to require that all four regions are specified inst
Quoting Kuogee Hsieh (2021-07-13 08:54:04)
> Remove special handling of replug interrupt and instead treat replug event
> as a sequential unplug followed by a plugin event. This is needed to meet
> the requirements of DP Link Layer CTS test case 4.2.1.3.
>
> Changes in V2:
> -- add fixes statement
Quoting Kuogee Hsieh (2021-07-13 08:54:05)
> diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c
> b/drivers/gpu/drm/msm/dp/dp_panel.c
> index 88196f7..0fdb551 100644
> --- a/drivers/gpu/drm/msm/dp/dp_panel.c
> +++ b/drivers/gpu/drm/msm/dp/dp_panel.c
> @@ -303,7 +303,12 @@ void dp_panel_handle_sink_req
Quoting Kuogee Hsieh (2021-07-13 08:54:06)
> Initialize both pre-emphasis and voltage swing level to 0 before
> start link training and do not end link training until video is
> ready to reduce the period between end of link training and video
> start to meet Link Layer CTS requirement. This fixes
Quoting Kuogee Hsieh (2021-07-13 08:54:07)
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index 6a013b0..20951c8 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -1638,6 +1638,25 @@ static bool dp_ctrl_clock_recov
Quoting Kuogee Hsieh (2021-07-13 08:54:03)
> Aux hardware calibration sequence requires resetting the aux controller
> in order for the new setting to take effect. However resetting the AUX
> controller will also clear HPD interrupt status which may accidentally
> cause pending unplug interrupt to
Quoting Kuogee Hsieh (2021-07-13 08:54:02)
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index 27fb0f0..92cf331 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -1634,6 +1617,24 @@ void dp_ctrl_handle_sink_reques
Quoting Kuogee Hsieh (2021-07-13 08:54:01)
> DP cable should always connect to DPU during the entire PHY compliance
> testing run. Since DP PHY compliance test is executed at irq_hpd event
> context, dp_ctrl_off_link_stream() should be used instead of dp_ctrl_off().
> dp_ctrl_off() is used for unpl
On Tue, 2021-07-13 at 15:24 -0700, khs...@codeaurora.org wrote:
> On 2021-07-07 01:37, Jani Nikula wrote:
> > On Tue, 06 Jul 2021, Kuogee Hsieh wrote:
> > > From: Rajkumar Subbiah
> > >
> > > Commit 2f015ec6eab6 ("drm/dp_mst: Add sideband down request tracing +
> > > selftests") added some debug
On Thu, Jul 22, 2021 at 2:28 AM Christian König
wrote:
>
> Am 22.07.21 um 11:08 schrieb Daniel Vetter:
> > [SNIP]
> >> As far as I know wake_up_state() tries to run the thread on the CPU it was
> >> scheduled last, while wait_event_* makes the thread run on the CPU who
> >> issues the wake by defa
On Thu, Jul 22, 2021 at 1:42 AM Christian König
wrote:
>
> Am 21.07.21 um 21:03 schrieb Daniel Vetter:
> > On Wed, Jul 21, 2021 at 09:34:43AM -0700, Rob Clark wrote:
> >> On Wed, Jul 21, 2021 at 12:59 AM Daniel Vetter wrote:
> >>> On Wed, Jul 21, 2021 at 12:32 AM Rob Clark wrote:
> On Tue,
Am 22.07.21 um 12:47 schrieb Daniel Vetter:
On Thu, Jul 22, 2021 at 11:28:01AM +0200, Christian König wrote:
Am 22.07.21 um 11:08 schrieb Daniel Vetter:
[SNIP]
As far as I know wake_up_state() tries to run the thread on the CPU it was
scheduled last, while wait_event_* makes the thread run on
On Thu, Jul 22, 2021 at 11:28:01AM +0200, Christian König wrote:
> Am 22.07.21 um 11:08 schrieb Daniel Vetter:
> > [SNIP]
> > > As far as I know wake_up_state() tries to run the thread on the CPU it was
> > > scheduled last, while wait_event_* makes the thread run on the CPU who
> > > issues the wa
Am 22.07.21 um 11:08 schrieb Daniel Vetter:
[SNIP]
As far as I know wake_up_state() tries to run the thread on the CPU it was
scheduled last, while wait_event_* makes the thread run on the CPU who
issues the wake by default.
And yes I've also noticed this already and it was one of the reason wh
On Thu, Jul 22, 2021 at 10:42:26AM +0200, Christian König wrote:
> Am 21.07.21 um 21:03 schrieb Daniel Vetter:
> > On Wed, Jul 21, 2021 at 09:34:43AM -0700, Rob Clark wrote:
> > > On Wed, Jul 21, 2021 at 12:59 AM Daniel Vetter wrote:
> > > > On Wed, Jul 21, 2021 at 12:32 AM Rob Clark wrote:
> > >
Am 21.07.21 um 21:03 schrieb Daniel Vetter:
On Wed, Jul 21, 2021 at 09:34:43AM -0700, Rob Clark wrote:
On Wed, Jul 21, 2021 at 12:59 AM Daniel Vetter wrote:
On Wed, Jul 21, 2021 at 12:32 AM Rob Clark wrote:
On Tue, Jul 20, 2021 at 1:55 PM Daniel Vetter wrote:
On Tue, Jul 20, 2021 at 8:26 P
36 matches
Mail list logo
