Hi Dave & Daniel,
Here is msm-next for v5.14
Notable additions this time around:
* devcoredump support for display errors
* dpu: irq cleanup/refactor
* dpu: dt bindings conversion to yaml
* dsi: dt bindings conversion to yaml
* mdp5: alpha/blend_mode/zpos support
* mdp5: dynamic bandwidth manage
Quoting maitreye (2021-06-16 18:08:54)
> From: Maitreyee Rao
>
> Add trace points across the MSM DP driver to help debug
> interop issues.
>
> Signed-off-by: Maitreyee Rao
> ---
> drivers/gpu/drm/msm/dp/dp_aux.c | 5 +++--
> drivers/gpu/drm/msm/dp/dp_catalog.c | 4
> drivers/gpu/drm/m
Get rid of dpu_encoder_helper_register_irq/unregister_irq helpers, call
dpu_core_register/unregister_callback directly, without surrounding them
with helpers.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 64 ---
.../gpu/drm/msm/disp/dpu1/dpu
DPU interrupts code allows multiple callbacks per interrut. In reality
none of the interrupts is shared between blocks (and will probably never
be). Drop support for registering multiple callbacks per interrupt to
simplify interrupt handling code.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/
Drop the wrapping structures and the enum used to index those structures
in dpu_kms. Instead of them use IRQ indices and callback functions
directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 47 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h |
Remove extra dpu_irq_* wrappers from dpu_kms.c, merge them directly into
dpu_core_irq_* functions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 12 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 9 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
As dpu_core_irq was merged into dpu_hw_intr, merge data structures too,
removing the need for a separate data structure.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 51 +--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 5 ++
drivers/gpu/
We already clear the IRQ status register before processing IRQs, so do
not clear the register again. Especially do not clear the IRQ status
_after_ processing the IRQ as this way we can loose the event.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 17
This patch series reworks DPU's irq handling code by merging
dpu_core_irq into dpu_hw_intr, reworking/dropping irq-related helpers
and wrappers, etc.
Changes since v1:
- Rework callbacks registration code to allow just single callback per
interrupt. This removes need to do any memory allocatio
With dpu_core_irq being the wrapper around dpu_hw_interrupts, there is
little sense in having them separate. Squash them together to remove
another layer of abstraction (hw_intr ops).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/d
Hello,
On Thu, 17 Jun 2021 at 22:01, Bjorn Andersson
wrote:
>
> On Thu 17 Jun 09:09 CDT 2021, Dmitry Baryshkov wrote:
>
> > The struct dpu_irq_callbacks looks internal to IRQ handling code. Hide
> > it from the rest of the DPU driver.
> >
> > Signed-off-by: Dmitry Baryshkov
> > ---
> > drivers/
On Thu, 17 Jun 2021 10:43:33 -0400, Jonathan Marek wrote:
> These got lost when going from .txt to .yaml bindings, add them back.
>
> Signed-off-by: Jonathan Marek
> ---
> .../bindings/display/msm/dsi-phy-7nm.yaml | 66 +++
> 1 file changed, 66 insertions(+)
> create mode 10
On Thu 17 Jun 09:09 CDT 2021, Dmitry Baryshkov wrote:
> The struct dpu_irq_callbacks looks internal to IRQ handling code. Hide
> it from the rest of the DPU driver.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 18 +++---
> drivers/gpu/drm/msm/disp/
On Thu, Jun 17, 2021 at 8:09 AM Jonathan Marek wrote:
>
> These got lost when going from .txt to .yaml bindings, add them back.
>
Fixes: 8fc939e72ff8 ("dt-bindings: msm: dsi: add yaml schemas for DSI
PHY bindings")
> Signed-off-by: Jonathan Marek
> ---
> .../bindings/display/msm/dsi-phy-7nm.ya
Add the required changes to support 7nm pll/phy in CPHY mode.
This adds a "qcom,dsi-phy-cphy-mode" property for the PHY node to enable
the CPHY mode.
Signed-off-by: Jonathan Marek
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 2 +
drivers/gpu/drm/msm/dsi/dsi_h
Document a new phy-type property which will be used to determine whether
the phy should operate in D-PHY or C-PHY mode.
Signed-off-by: Jonathan Marek
Reviewed-by: Laurent Pinchart
---
.../devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 5 +
include/dt-bindings/phy/phy.h
These got lost when going from .txt to .yaml bindings, add them back.
Signed-off-by: Jonathan Marek
---
.../bindings/display/msm/dsi-phy-7nm.yaml | 66 +++
1 file changed, 66 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
di
Add the required changes to support 7nm pll/phy in CPHY mode.
This adds a "qcom,dsi-phy-cphy-mode" property for the PHY node to enable
the CPHY mode.
v2:
- rebased on DSI PHY reworks
- reworked getting cphy_mode in dsi_host.c
- documentation change in separate patch
v3:
- yaml bindings
- ch
On 6/16/21 1:50 AM, rajee...@codeaurora.org wrote:
On 03-06-2021 01:32, rajee...@codeaurora.org wrote:
On 02-06-2021 02:28, Rob Herring wrote:
On Mon, May 31, 2021 at 07:03:53PM +0530, Rajeev Nandan wrote:
+
+properties:
+ compatible:
+ oneOf:
+ - const: qcom,dsi-phy-7nm
When woul
Remove extra dpu_irq_* wrappers from dpu_kms.c, merge them directly into
dpu_core_irq_* functions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 12 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 9 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
Drop the wrapping structures and the enum used to index those structures
in dpu_kms. Instead of them use IRQ indices and callback functions
directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 47 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h |
Get rid of dpu_encoder_helper_register_irq/unregister_irq helpers, call
dpu_core_register/unregister_callback directly, without surrounding them
with helpers.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 64 ---
.../gpu/drm/msm/disp/dpu1/dpu
The struct dpu_irq_callbacks looks internal to IRQ handling code. Hide
it from the rest of the DPU driver.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 18 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_p
As dpu_core_irq was merged into dpu_hw_intr, merge data structures too,
removing the need for a separate data structure.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 51 +--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 5 ++
drivers/gpu/
We already clear the IRQ status register before processing IRQs, so do
not clear the register again. Especially do not clear the IRQ status
_after_ processing the IRQ as this way we can loose the event.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 17
With dpu_core_irq being the wrapper around dpu_hw_interrupts, there is
little sense in having them separate. Squash them together to remove
another layer of abstraction (hw_intr ops).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/d
This patch series reworks DPU's irq handling code by merging
dpu_core_irq into dpu_hw_intr, reworking/dropping irq-related helpers
and wrappers, etc.
Dependencies:
https://lore.kernel.org/linux-arm-msm/20210611170003.3539059-1-bjorn.anders...@linaro.org/
-
On 03-06-21, 16:40, abhin...@codeaurora.org wrote:
> On 2021-06-02 04:01, Vinod Koul wrote:
> > On 27-05-21, 16:30, Rob Clark wrote:
> >
> > yeah that is always a very different world. although it might make sense
> > to use information in tables and try to deduce information about the
> > system
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