On 2020-11-24 00:52, Rob Clark wrote:
On Mon, Nov 23, 2020 at 9:01 AM Sai Prakash Ranjan
wrote:
On 2020-11-23 20:51, Will Deacon wrote:
> On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
>> Some hardware variants contain a system cache or the last level
>> cache(llc). This c
On Mon, Nov 23, 2020 at 4:38 PM wrote:
>
> Hi Rob
>
> On 2020-11-23 15:18, Rob Clark wrote:
> > On Thu, Nov 19, 2020 at 1:41 PM Abhinav Kumar
> > wrote:
> >>
> >> Update the qos remap only if the client type changes for the plane.
> >> This will avoid unnecessary register programming and also avo
Hi Rob
On 2020-11-23 15:18, Rob Clark wrote:
On Thu, Nov 19, 2020 at 1:41 PM Abhinav Kumar
wrote:
Update the qos remap only if the client type changes for the plane.
This will avoid unnecessary register programming and also avoid log
spam from the dpu_vbif_set_qos_remap() function.
Signed-of
On Thu, Nov 19, 2020 at 1:41 PM Abhinav Kumar wrote:
>
> Update the qos remap only if the client type changes for the plane.
> This will avoid unnecessary register programming and also avoid log
> spam from the dpu_vbif_set_qos_remap() function.
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/g
On 2020-11-23 03:18, Lee Jones wrote:
These tables are not large or overbearing, so moving them into the
source file seems like the right thing to do. The alternative is to
use __maybe_unused, which is undesirable.
Fixes the following W=1 kernel build warning(s):
In file included from
driver
On 2020-11-23 03:19, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/msm_drv.c:124:15: warning: no previous prototype
for ‘_msm_ioremap’ [-Wmissing-prototypes]
Cc: Rob Clark
Cc: Sean Paul
Cc: David Airlie
Cc: Daniel Vetter
Cc: linux-arm-...@vger.kernel
On 2020-11-23 03:19, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c:247: warning: Excess function
parameter 'Return' description in '_dpu_rm_check_lm_peer'
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c:283: warning: Function
parameter or membe
On 2020-11-23 03:19, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:152: warning: Function
parameter or member 'plane' not described in '_dpu_plane_calc_bw'
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:152: warning: Function
parameter o
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c:55: warning: Function
parameter or member 'ctx' not described in '_stage_offset'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c:55: warning: Excess
function parameter 'c'
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function
parameter or member 'ctx' not described in 'dpu_hw_sspp_setup_format'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function
par
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c:31: warning: Enum value
'DPU_PERF_MODE_MAX' not described in enum 'dpu_perf_mode'
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c:34: warning: Cannot
understand *
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:207: warning: Function
parameter or member 'cur_slave' not described in 'dpu_encoder_virt'
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:207: warning: Function
param
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:50: warning: Function
parameter or member 'fmt' not described in 'INTERLEAVED_RGB_FMT'
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:50: warning: Function
parameter
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:124:19: warning:
initialized field overwritten [-Woverride-init]
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:124:19: note: (near
initialization for ‘sm8250_d
On 2020-11-23 03:18, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c:28: warning: Function
parameter or member 'hw_blk' not described in 'dpu_hw_blk_init'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c:120: warning: Excess
function param
On Mon, Nov 23, 2020 at 9:01 AM Sai Prakash Ranjan
wrote:
>
> On 2020-11-23 20:51, Will Deacon wrote:
> > On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
> >> Some hardware variants contain a system cache or the last level
> >> cache(llc). This cache is typically a large block
Fix the checkpatch warning for space required before the open
parenthesis.
Signed-off-by: Sai Prakash Ranjan
Acked-by: Will Deacon
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
b/dri
Use table and of_match_node() to match qcom implementation
instead of multiple of_device_compatible() calls for each
QCOM SMMU implementation.
Signed-off-by: Sai Prakash Ranjan
Acked-by: Will Deacon
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 9 +
drivers/iommu/arm/arm-smmu/arm-sm
From: Jordan Crouse
GPU targets with an MMU-500 attached have a slightly different process for
enabling system cache. Use the compatible string on the IOMMU phandle
to see if an MMU-500 is attached and modify the programming sequence
accordingly.
Signed-off-by: Jordan Crouse
Signed-off-by: Sai
From: Sharat Masetty
The last level system cache can be partitioned to 32 different
slices of which GPU has two slices preallocated. One slice is
used for caching GPU buffers and the other slice is used for
caching the GPU SMMU pagetables. This talks to the core system
cache driver to acquire the
From: Sharat Masetty
The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.
Signed-off-by: Sharat Masetty
Reviewed-by: Jordan Crouse
Signed-off-by: Sai Prak
Now that we have a struct io_pgtable_domain_attr with quirks,
use that for non_strict mode as well thereby removing the need
for more members of arm_smmu_domain in the future.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 8 +++-
drivers/iommu/arm/arm-smmu/arm
Add iommu domain attribute for pagetable configuration which
initially will be used to set quirks like for system cache aka
last level cache to be used by client drivers like GPU to set
right attributes for caching the hardware pagetables into the
system cache and later can be extended to include o
Some hardware variants contain a system cache or the last level
cache(llc). This cache is typically a large block which is shared
by multiple clients on the SOC. GPU uses the system cache to cache
both the GPU data buffers(like textures) as well the SMMU pagetables.
This helps with improved render
Add a quirk IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to override
the outer-cacheability attributes set in the TCR for a
non-coherent page table walker when using system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/io-pgtable-arm.c | 10 --
include/linux/io-pgtable.h | 4
2
On 2020-11-23 20:51, Will Deacon wrote:
On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
Some hardware variants contain a system cache or the last level
cache(llc). This cache is typically a large block which is shared
by multiple clients on the SOC. GPU uses the system cache
On 2020-11-23 20:49, Will Deacon wrote:
On Tue, Nov 17, 2020 at 08:00:42PM +0530, Sai Prakash Ranjan wrote:
Now that we have a struct domain_attr_io_pgtbl_cfg with quirks,
use that for non_strict mode as well thereby removing the need
for more members of arm_smmu_domain in the future.
Signed-of
On 2020-11-23 20:48, Will Deacon wrote:
On Tue, Nov 17, 2020 at 08:00:41PM +0530, Sai Prakash Ranjan wrote:
Add iommu domain attribute for pagetable configuration which
initially will be used to set quirks like for system cache aka
last level cache to be used by client drivers like GPU to set
ri
On 2020-11-23 20:36, Will Deacon wrote:
On Tue, Nov 17, 2020 at 08:00:40PM +0530, Sai Prakash Ranjan wrote:
Add a quirk IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to override
the attributes set in TCR for the page table walker when
using system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/
On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
> Some hardware variants contain a system cache or the last level
> cache(llc). This cache is typically a large block which is shared
> by multiple clients on the SOC. GPU uses the system cache to cache
> both the GPU data buffers(
On Tue, Nov 17, 2020 at 08:00:42PM +0530, Sai Prakash Ranjan wrote:
> Now that we have a struct domain_attr_io_pgtbl_cfg with quirks,
> use that for non_strict mode as well thereby removing the need
> for more members of arm_smmu_domain in the future.
>
> Signed-off-by: Sai Prakash Ranjan
> ---
>
On Tue, Nov 17, 2020 at 08:00:41PM +0530, Sai Prakash Ranjan wrote:
> Add iommu domain attribute for pagetable configuration which
> initially will be used to set quirks like for system cache aka
> last level cache to be used by client drivers like GPU to set
> right attributes for caching the hard
On Tue, Nov 17, 2020 at 08:00:40PM +0530, Sai Prakash Ranjan wrote:
> Add a quirk IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to override
> the attributes set in TCR for the page table walker when
> using system cache.
>
> Signed-off-by: Sai Prakash Ranjan
> ---
> drivers/iommu/io-pgtable-arm.c | 10 +++
On Mon, 23 Nov 2020, Christian König wrote:
> Only skimmed over them, but over all looks sane to me.
>
> Series is Acked-by: Christian König
Thanks Christian, much appreciated.
> Am 23.11.20 um 12:18 schrieb Lee Jones:
> > This set is part of a larger effort attempting to clean-up W=1
> > kern
Only skimmed over them, but over all looks sane to me.
Series is Acked-by: Christian König
Thanks,
Christian.
Am 23.11.20 um 12:18 schrieb Lee Jones:
This set is part of a larger effort attempting to clean-up W=1
kernel builds, which are currently overwhelmingly riddled with
niggly little war
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/msm_drv.c:124:15: warning: no previous prototype for
‘_msm_ioremap’ [-Wmissing-prototypes]
Cc: Rob Clark
Cc: Sean Paul
Cc: David Airlie
Cc: Daniel Vetter
Cc: linux-arm-...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.or
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:152: warning: Function parameter or
member 'plane' not described in '_dpu_plane_calc_bw'
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:152: warning: Function parameter or
member 'fb' not described in '_dpu_p
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c:247: warning: Excess function parameter
'Return' description in '_dpu_rm_check_lm_peer'
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c:283: warning: Function parameter or
member 'global_state' not described in '_dp
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c:150: warning: Function parameter or
member 'dpu_kms' not described in 'dpu_vbif_set_ot_limit'
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c:150: warning: Excess function
parameter 'vbif' description in 'dpu_vb
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c:55: warning: Function parameter or
member 'ctx' not described in '_stage_offset'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c:55: warning: Excess function
parameter 'c' description in '_stage_offset'
Cc: R
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function parameter
or member 'ctx' not described in 'dpu_hw_sspp_setup_format'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function parameter
or member 'fmt' not described i
These tables are not large or overbearing, so moving them into the
source file seems like the right thing to do. The alternative is to
use __maybe_unused, which is undesirable.
Fixes the following W=1 kernel build warning(s):
In file included from drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c:31: warning: Enum value
'DPU_PERF_MODE_MAX' not described in enum 'dpu_perf_mode'
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c:34: warning: Cannot understand
* @_dpu_core_perf_calc_bw() - to calcul
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:207: warning: Function parameter
or member 'cur_slave' not described in 'dpu_encoder_virt'
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:207: warning: Function parameter
or member 'hw_pp' not described i
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:50: warning: Function parameter or
member 'fmt' not described in 'INTERLEAVED_RGB_FMT'
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:50: warning: Function parameter or
member 'a' not described in 'INTERL
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:124:19: warning: initialized
field overwritten [-Woverride-init]
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:124:19: note: (near
initialization for ‘sm8250_dpu_caps.max_linewidth’)
Cc: Rob Clark
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c:28: warning: Function parameter or
member 'hw_blk' not described in 'dpu_hw_blk_init'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c:120: warning: Excess function
parameter 'free_blk' description in 'dpu_hw
This set is part of a larger effort attempting to clean-up W=1
kernel builds, which are currently overwhelmingly riddled with
niggly little warnings.
Only 900 (from 5000) to go!
Lee Jones (40):
drm/radeon/radeon_device: Consume our own header where the prototypes
are located
drm/amd/amdgp
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