Re: [Freedreno] [v1] drm/msm/dpu: update reservations in commit path

On Tue, Aug 4, 2020 at 4:32 AM Kalyan Thota wrote: > > DPU resources reserved in the atomic_check path gets unwinded > during modeset operation before commit happens in a non seamless > transition. > > Update the reservations in the commit path to avoid resource > failures. Secondly have dummy res

Re: [Freedreno] [PATCH 2/3] arm64: dts: sc7180: add bus clock to mdp node for sc7180 target

On Thu, Jul 16, 2020 at 4:36 AM Kalyan Thota wrote: > > From: Krishna Manikandan > > Move the bus clock to mdp device node,in order > to facilitate bus band width scaling on sc7180 > target. > > The parent device MDSS will not vote for bus bw, > instead the vote will be triggered by mdp device >

Re: [Freedreno] [PATCH 1/3] arm64: dts: sc7180: add interconnect bindings for display

On Thu, Jul 16, 2020 at 4:36 AM Kalyan Thota wrote: > > From: Krishna Manikandan > > This change adds the interconnect bindings to the > MDSS node. This will establish Display to DDR path > for bus bandwidth voting. > > Changes in v2: > - Change in commit message(Matthias Kaehlcke) > > Ch

Re: [Freedreno] [PATCH 3/3] drm/msm/dpu: add support for clk and bw scaling for display

On Thu, Jul 16, 2020 at 4:36 AM Kalyan Thota wrote: > > This change adds support to scale src clk and bandwidth as > per composition requirements. > > Interconnect registration for bw has been moved to mdp > device node from mdss to facilitate the scaling. > > Changes in v1: > - Address armv7 com

Re: [Freedreno] [PATCH 4/9] drm/msm/dsi: Add phy configuration for SDM630/636/660

On Tue, Aug 4, 2020 at 5:09 AM Vinod Koul wrote: > > On 03-08-20, 09:06, Rob Clark wrote: > > On Mon, Aug 3, 2020 at 4:00 AM Vinod Koul wrote: > > > > > > On 26-07-20, 13:12, Konrad Dybcio wrote: > > > > These SoCs make use of the 14nm phy, but at different > > > > addresses than other 14nm units

Re: [Freedreno] [PATCH 4/9] drm/msm/dsi: Add phy configuration for SDM630/636/660

On 03-08-20, 09:06, Rob Clark wrote: > On Mon, Aug 3, 2020 at 4:00 AM Vinod Koul wrote: > > > > On 26-07-20, 13:12, Konrad Dybcio wrote: > > > These SoCs make use of the 14nm phy, but at different > > > addresses than other 14nm units. > > > > > > Signed-off-by: Konrad Dybcio > > > --- > > > ...

[Freedreno] [v1] drm/msm/dpu: update reservations in commit path

DPU resources reserved in the atomic_check path gets unwinded during modeset operation before commit happens in a non seamless transition. Update the reservations in the commit path to avoid resource failures. Secondly have dummy reservations in atomic_check path so that we can gracefully fail the