Re: [Freedreno] [PATCH v5 0/8] drm/msm/dsi: Get PHY ref clocks from the DT

2019-01-28 Thread Matthias Kaehlcke
Hi, this series has gone through multiple rounds of review and there are no outstanding comments. It seems it should be ready to land, or is there anything left that needs to be addressed? Thanks Matthias On Wed, Dec 19, 2018 at 03:55:20PM -0800, Matthias Kaehlcke wrote: > The MSM DSI PHY drive

Re: [Freedreno] [DPU PATCH] drm: add definitions for DP Audio/Video compliance tests

2019-01-28 Thread chandanu
On 2019-01-22 11:05, Sean Paul wrote: On Tue, Jan 01, 2019 at 11:15:25PM -0800, Chandan Uddaraju wrote: This seems fine to me. Could you please: - delete the cover letter - move the cover letter description into the patch commit msg - strip DPU from the subject prefix - send it to dri-devel, mai

[Freedreno] [PATCH v2] drm: add definitions for DP Audio/Video compliance tests

2019-01-28 Thread Chandan Uddaraju
This change adds definitions needed for DP audio compliance testing. It also adds missing definition for DP video compliance. Changes in V2: -- Delete cover letter for this patch. -- Move the description from cover letter into patch commit message. -- Remove DPU from subject prefix Signed-off-by:

Re: [Freedreno] [PATCH 2/4] drm/msm: dpu: Simplify frame_done watchdog timeout calculation

2019-01-28 Thread Abhinav Kumar
On 2019-01-28 12:42, Sean Paul wrote: From: Sean Paul Instead of setting the timeout and then immediately reading it back (along with the hand-rolled msecs_to_jiffies calculation), just calculate it once and set it in both places at the same time. Signed-off-by: Sean Paul Reviewed-by: Abhina

Re: [Freedreno] [PATCH 1/4] drm/msm: Use drm_mode_vrefresh instead of mode->vrefresh

2019-01-28 Thread Abhinav Kumar
On 2019-01-28 12:42, Sean Paul wrote: From: Sean Paul Use the drm_mode_vrefresh helper where we need refresh rate in case vrefresh is empty. Signed-off-by: Sean Paul Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++--- drivers/gpu/drm/msm/disp/dp

[Freedreno] [PATCH 2/4] drm/msm: dpu: Simplify frame_done watchdog timeout calculation

2019-01-28 Thread Sean Paul
From: Sean Paul Instead of setting the timeout and then immediately reading it back (along with the hand-rolled msecs_to_jiffies calculation), just calculate it once and set it in both places at the same time. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ++

[Freedreno] [PATCH 3/4] drm/msm: dpu: Untangle frame_done timeout units

2019-01-28 Thread Sean Paul
From: Sean Paul There exists a bunch of confusion as to what the actual units of frame_done is: - The definition states it's in # of frames - CRTC treats it like it's ms - frame_done_timeout comment thinks it's Hz, but it stores ms - frame_done timer is setup such that it _should_ be in frames,

[Freedreno] [PATCH 4/4] drm/msm: dpu: Don't queue the frame_done watchdog for cursor

2019-01-28 Thread Sean Paul
From: Sean Paul In the case of an async/cursor update, we don't wait for the frame_done event, which means handle_frame_done is never called, and the frame_done watchdog isn't canceled. Currently, this results in a frame_done timeout every time the cursor moves without a synchronous frame followi

[Freedreno] [PATCH 1/4] drm/msm: Use drm_mode_vrefresh instead of mode->vrefresh

2019-01-28 Thread Sean Paul
From: Sean Paul Use the drm_mode_vrefresh helper where we need refresh rate in case vrefresh is empty. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 5 +++-- drivers/gpu/drm/msm/disp/dpu1/dpu

[Freedreno] [PATCH v2] drm/msm/dpu: remove struct encoder_kickoff_params

2019-01-28 Thread Sean Paul
From: Bruce Wang The contents of struct encoder_kickoff_params are never used. Remove the structure and all remnants of it from function calls. Changes in v2 (seanpaul): - Actually remove the struct (Jeykumar) Cc: Jeykumar Sankaran Signed-off-by: Bruce Wang Signed-off-by: Sean Paul --- Send

[Freedreno] [PATCH AUTOSEL 4.19 138/258] drm/msm: dpu: Only check flush register against pending flushes

2019-01-28 Thread Sasha Levin
From: Sean Paul [ Upstream commit 5f79e03b1f7c1b2cf0019ce6365fe5d52629813d ] There exists a case where a flush of a plane/dma may have been triggered & started from an async commit. If that plane/dma is subsequently disabled by the next commit, the flush register will continue to hold the flush

[Freedreno] [PATCH AUTOSEL 4.19 137/258] drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driver

2019-01-28 Thread Sasha Levin
From: Abhinav Kumar [ Upstream commit c1866d44d149a1ea5c303632114fb6aa08cfd263 ] Fix the dsi clock names in the DSI 10nm PLL driver to match the names in the dispcc driver as those are according to the clock plan of the chipset. Changes in v2: - Update the clock diagram with the new clock name

[Freedreno] [PATCH AUTOSEL 4.20 162/304] drm/msm: dpu: Only check flush register against pending flushes

2019-01-28 Thread Sasha Levin
From: Sean Paul [ Upstream commit 5f79e03b1f7c1b2cf0019ce6365fe5d52629813d ] There exists a case where a flush of a plane/dma may have been triggered & started from an async commit. If that plane/dma is subsequently disabled by the next commit, the flush register will continue to hold the flush

[Freedreno] [PATCH AUTOSEL 4.20 161/304] drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driver

2019-01-28 Thread Sasha Levin
From: Abhinav Kumar [ Upstream commit c1866d44d149a1ea5c303632114fb6aa08cfd263 ] Fix the dsi clock names in the DSI 10nm PLL driver to match the names in the dispcc driver as those are according to the clock plan of the chipset. Changes in v2: - Update the clock diagram with the new clock name

Re: [Freedreno] [RFC 0/4] freedreno: Move some compiler offset computations to NIR

2019-01-28 Thread Rob Clark
On Mon, Jan 28, 2019 at 3:32 AM Eduardo Lima Mitev wrote: > > On 1/26/19 12:42 AM, Rob Clark wrote: > > On Fri, Jan 25, 2019 at 10:48 AM Eduardo Lima Mitev > > wrote: > >> > >> There are a bunch of instructions emitted on ir3_compiler_nir related to > >> offset computations for IO opcodes (ssbo,

Re: [Freedreno] [Mesa-dev] [RFC 1/4] nir: Add a new intrinsic 'load_image_stride'

2019-01-28 Thread Bas Nieuwenhuizen
On Mon, Jan 28, 2019 at 9:38 AM Eduardo Lima Mitev wrote: > > On 1/26/19 5:34 PM, Jason Ekstrand wrote: > > Mind suffixing it with _ir3 or something since it's a back-end-specific > > intrinsic? Incidentally, this looks a lot like load_image_param_intel. > > > > Yes, I felt inclined to add the su

Re: [Freedreno] [Mesa-dev] [RFC 1/4] nir: Add a new intrinsic 'load_image_stride'

2019-01-28 Thread Eduardo Lima Mitev
On 1/28/19 10:16 AM, Eduardo Lima Mitev wrote: > On 1/28/19 9:56 AM, Bas Nieuwenhuizen wrote: >> On Mon, Jan 28, 2019 at 9:38 AM Eduardo Lima Mitev wrote: >>> >>> On 1/26/19 5:34 PM, Jason Ekstrand wrote: Mind suffixing it with _ir3 or something since it's a back-end-specific intrinsic?

Re: [Freedreno] [Mesa-dev] [RFC 1/4] nir: Add a new intrinsic 'load_image_stride'

2019-01-28 Thread Eduardo Lima Mitev
On 1/28/19 9:56 AM, Bas Nieuwenhuizen wrote: > On Mon, Jan 28, 2019 at 9:38 AM Eduardo Lima Mitev wrote: >> >> On 1/26/19 5:34 PM, Jason Ekstrand wrote: >>> Mind suffixing it with _ir3 or something since it's a back-end-specific >>> intrinsic? Incidentally, this looks a lot like load_image_param_

Re: [Freedreno] [Mesa-dev] [RFC 1/4] nir: Add a new intrinsic 'load_image_stride'

2019-01-28 Thread Eduardo Lima Mitev
On 1/26/19 5:34 PM, Jason Ekstrand wrote: > Mind suffixing it with _ir3 or something since it's a back-end-specific > intrinsic?  Incidentally, this looks a lot like load_image_param_intel. > Yes, I felt inclined to add the suffix but wasn't sure how good/bad a practice it is, so I deferred it to

Re: [Freedreno] [RFC 0/4] freedreno: Move some compiler offset computations to NIR

2019-01-28 Thread Eduardo Lima Mitev
On 1/26/19 12:42 AM, Rob Clark wrote: > On Fri, Jan 25, 2019 at 10:48 AM Eduardo Lima Mitev wrote: >> >> There are a bunch of instructions emitted on ir3_compiler_nir related to >> offset computations for IO opcodes (ssbo, image, etc). This small series >> explores the possibility of moving these